arm64: dts: exynosautov920: add cpucl0 clock DT nodes

Add cmu_cpucl0 clocks for switch, cluster, and dbg domains respectively.

Signed-off-by: Shin Son <shin.son@samsung.com>
Link: https://lore.kernel.org/r/20250423044153.1288077-4-shin.son@samsung.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

diff --git a/arch/arm64/boot/dts/exynos/exynosautov920.dtsi b/arch/arm64/boot/dts/exynos/exynosautov920.dtsi
index c1b7d05d30da713b8b5dc623ddd7c5479107cccb..9350c53f935e32f5ba0a7bdd3659b99859726e7a 100644 (file)
--- a/arch/arm64/boot/dts/exynos/exynosautov920.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynosautov920.dtsi
@@ -1075,6 +1075,21 @@
                        compatible = "samsung,exynosautov920-pinctrl";
                        reg = <0x1a460000 0x10000>;
                };
+
+               cmu_cpucl0: clock-controller@1ec00000 {
+                       compatible = "samsung,exynosautov920-cmu-cpucl0";
+                       reg = <0x1ec00000 0x8000>;
+                       #clock-cells = <1>;
+
+                       clocks = <&xtcxo>,
+                                <&cmu_top DOUT_CLKCMU_CPUCL0_SWITCH>,
+                                <&cmu_top DOUT_CLKCMU_CPUCL0_CLUSTER>,
+                                <&cmu_top DOUT_CLKCMU_CPUCL0_DBG>;
+                       clock-names = "oscclk",
+                                     "switch",
+                                     "cluster",
+                                     "dbg";
+               };
        };
 
        timer {