]> www.infradead.org Git - users/jedix/linux-maple.git/commitdiff
iommu/vt-d: Use PCI_DEVID() macro
authorJinjie Ruan <ruanjinjie@huawei.com>
Mon, 4 Nov 2024 01:40:28 +0000 (09:40 +0800)
committerJoerg Roedel <jroedel@suse.de>
Tue, 5 Nov 2024 12:32:19 +0000 (13:32 +0100)
The macro PCI_DEVID() can be used instead of compose it manually.

Signed-off-by: Jinjie Ruan <ruanjinjie@huawei.com>
Reviewed-by: Jason Gunthorpe <jgg@nvidia.com>
Link: https://lore.kernel.org/r/20240829021011.4135618-1-ruanjinjie@huawei.com
Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com>
Signed-off-by: Joerg Roedel <jroedel@suse.de>
drivers/iommu/intel/iommu.c
drivers/iommu/intel/irq_remapping.c
drivers/iommu/intel/pasid.c

index 2b5027dd0c961229c82184c8452feacd118af199..2d67db67f5e343ae7151da7ee17b85035125353c 100644 (file)
@@ -1452,7 +1452,7 @@ static void copied_context_tear_down(struct intel_iommu *iommu,
 
        if (did_old < cap_ndoms(iommu->cap)) {
                iommu->flush.flush_context(iommu, did_old,
-                                          (((u16)bus) << 8) | devfn,
+                                          PCI_DEVID(bus, devfn),
                                           DMA_CCMD_MASK_NOBIT,
                                           DMA_CCMD_DEVICE_INVL);
                iommu->flush.flush_iotlb(iommu, did_old, 0, 0,
@@ -1473,7 +1473,7 @@ static void context_present_cache_flush(struct intel_iommu *iommu, u16 did,
 {
        if (cap_caching_mode(iommu->cap)) {
                iommu->flush.flush_context(iommu, 0,
-                                          (((u16)bus) << 8) | devfn,
+                                          PCI_DEVID(bus, devfn),
                                           DMA_CCMD_MASK_NOBIT,
                                           DMA_CCMD_DEVICE_INVL);
                iommu->flush.flush_iotlb(iommu, did, 0, 0, DMA_TLB_DSI_FLUSH);
index 7a6d188e3bea098c2f07bfb1af52c8ed2930a818..466c1412dd4567664824c68f8ec0e3dce60382ff 100644 (file)
@@ -312,7 +312,7 @@ static int set_ioapic_sid(struct irte *irte, int apic)
 
        for (i = 0; i < MAX_IO_APICS; i++) {
                if (ir_ioapic[i].iommu && ir_ioapic[i].id == apic) {
-                       sid = (ir_ioapic[i].bus << 8) | ir_ioapic[i].devfn;
+                       sid = PCI_DEVID(ir_ioapic[i].bus, ir_ioapic[i].devfn);
                        break;
                }
        }
@@ -337,7 +337,7 @@ static int set_hpet_sid(struct irte *irte, u8 id)
 
        for (i = 0; i < MAX_HPET_TBS; i++) {
                if (ir_hpet[i].iommu && ir_hpet[i].id == id) {
-                       sid = (ir_hpet[i].bus << 8) | ir_hpet[i].devfn;
+                       sid = PCI_DEVID(ir_hpet[i].bus, ir_hpet[i].devfn);
                        break;
                }
        }
index 53157e1194f48649e4e6422261445ef793e144ca..7ef157615e0f8f518562e0cf8d514348a2b6806b 100644 (file)
@@ -220,7 +220,7 @@ devtlb_invalidation_with_pasid(struct intel_iommu *iommu,
        if (pci_dev_is_disconnected(to_pci_dev(dev)))
                return;
 
-       sid = info->bus << 8 | info->devfn;
+       sid = PCI_DEVID(info->bus, info->devfn);
        qdep = info->ats_qdep;
        pfsid = info->pfsid;