if (did_old < cap_ndoms(iommu->cap)) {
                iommu->flush.flush_context(iommu, did_old,
-                                          (((u16)bus) << 8) | devfn,
+                                          PCI_DEVID(bus, devfn),
                                           DMA_CCMD_MASK_NOBIT,
                                           DMA_CCMD_DEVICE_INVL);
                iommu->flush.flush_iotlb(iommu, did_old, 0, 0,
 {
        if (cap_caching_mode(iommu->cap)) {
                iommu->flush.flush_context(iommu, 0,
-                                          (((u16)bus) << 8) | devfn,
+                                          PCI_DEVID(bus, devfn),
                                           DMA_CCMD_MASK_NOBIT,
                                           DMA_CCMD_DEVICE_INVL);
                iommu->flush.flush_iotlb(iommu, did, 0, 0, DMA_TLB_DSI_FLUSH);
 
 
        for (i = 0; i < MAX_IO_APICS; i++) {
                if (ir_ioapic[i].iommu && ir_ioapic[i].id == apic) {
-                       sid = (ir_ioapic[i].bus << 8) | ir_ioapic[i].devfn;
+                       sid = PCI_DEVID(ir_ioapic[i].bus, ir_ioapic[i].devfn);
                        break;
                }
        }
 
        for (i = 0; i < MAX_HPET_TBS; i++) {
                if (ir_hpet[i].iommu && ir_hpet[i].id == id) {
-                       sid = (ir_hpet[i].bus << 8) | ir_hpet[i].devfn;
+                       sid = PCI_DEVID(ir_hpet[i].bus, ir_hpet[i].devfn);
                        break;
                }
        }
 
        if (pci_dev_is_disconnected(to_pci_dev(dev)))
                return;
 
-       sid = info->bus << 8 | info->devfn;
+       sid = PCI_DEVID(info->bus, info->devfn);
        qdep = info->ats_qdep;
        pfsid = info->pfsid;