dt-bindings: reset: add reset IDs for Agilex5

Add reset ID definitions required for Intel Agilex5 SoCFPGA, re-use
altr,rst-mgr-s10.h as common header file similar S10 & Agilex.

Acked-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Dinh Nguyen <dinguyen@kernel.org>
Signed-off-by: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>

diff --git a/include/dt-bindings/reset/altr,rst-mgr-s10.h b/include/dt-bindings/reset/altr,rst-mgr-s10.h
index 70ea3a09dbe1989361756ea718d5b2868ea7d543..04c4d0c6fd34bcc7df44b9ecdafe787d9551b089 100644 (file)
--- a/include/dt-bindings/reset/altr,rst-mgr-s10.h
+++ b/include/dt-bindings/reset/altr,rst-mgr-s10.h
@@ -63,12 +63,15 @@
 #define I2C2_RESET             74
 #define I2C3_RESET             75
 #define I2C4_RESET             76
-/* 77-79 is empty */
+#define I3C0_RESET             77
+#define I3C1_RESET             78
+/* 79 is empty */
 #define UART0_RESET            80
 #define UART1_RESET            81
 /* 82-87 is empty */
 #define GPIO0_RESET            88
 #define GPIO1_RESET            89
+#define WATCHDOG4_RESET                90
 
 /* BRGMODRST */
 #define SOC2FPGA_RESET         96