new_delay = dev_priv->rps.cur_freq;
        min = dev_priv->rps.min_freq_softlimit;
        max = dev_priv->rps.max_freq_softlimit;
-
-       if (client_boost) {
-               new_delay = dev_priv->rps.max_freq_softlimit;
+       if (client_boost || any_waiters(dev_priv))
+               max = dev_priv->rps.max_freq;
+       if (client_boost && new_delay < dev_priv->rps.boost_freq) {
+               new_delay = dev_priv->rps.boost_freq;
                adj = 0;
        } else if (pm_iir & GEN6_PM_RP_UP_THRESHOLD) {
                if (adj > 0)
                        new_delay = dev_priv->rps.efficient_freq;
                        adj = 0;
                }
-       } else if (any_waiters(dev_priv)) {
+       } else if (client_boost || any_waiters(dev_priv)) {
                adj = 0;
        } else if (pm_iir & GEN6_PM_RP_DOWN_TIMEOUT) {
                if (dev_priv->rps.cur_freq > dev_priv->rps.efficient_freq)
 
        return snprintf(buf, PAGE_SIZE, "%d\n", ret);
 }
 
+static ssize_t gt_boost_freq_mhz_show(struct device *kdev, struct device_attribute *attr, char *buf)
+{
+       struct drm_minor *minor = dev_to_drm_minor(kdev);
+       struct drm_i915_private *dev_priv = to_i915(minor->dev);
+
+       return snprintf(buf, PAGE_SIZE, "%d\n",
+                       intel_gpu_freq(dev_priv, dev_priv->rps.boost_freq));
+}
+
+static ssize_t gt_boost_freq_mhz_store(struct device *kdev,
+                                      struct device_attribute *attr,
+                                      const char *buf, size_t count)
+{
+       struct drm_minor *minor = dev_to_drm_minor(kdev);
+       struct drm_device *dev = minor->dev;
+       struct drm_i915_private *dev_priv = dev->dev_private;
+       u32 val;
+       ssize_t ret;
+
+       ret = kstrtou32(buf, 0, &val);
+       if (ret)
+               return ret;
+
+       /* Validate against (static) hardware limits */
+       val = intel_freq_opcode(dev_priv, val);
+       if (val < dev_priv->rps.min_freq || val > dev_priv->rps.max_freq)
+               return -EINVAL;
+
+       mutex_lock(&dev_priv->rps.hw_lock);
+       dev_priv->rps.boost_freq = val;
+       mutex_unlock(&dev_priv->rps.hw_lock);
+
+       return count;
+}
+
 static ssize_t vlv_rpe_freq_mhz_show(struct device *kdev,
                                     struct device_attribute *attr, char *buf)
 {
 
 static DEVICE_ATTR(gt_act_freq_mhz, S_IRUGO, gt_act_freq_mhz_show, NULL);
 static DEVICE_ATTR(gt_cur_freq_mhz, S_IRUGO, gt_cur_freq_mhz_show, NULL);
+static DEVICE_ATTR(gt_boost_freq_mhz, S_IRUGO, gt_boost_freq_mhz_show, gt_boost_freq_mhz_store);
 static DEVICE_ATTR(gt_max_freq_mhz, S_IRUGO | S_IWUSR, gt_max_freq_mhz_show, gt_max_freq_mhz_store);
 static DEVICE_ATTR(gt_min_freq_mhz, S_IRUGO | S_IWUSR, gt_min_freq_mhz_show, gt_min_freq_mhz_store);
 
 static const struct attribute *gen6_attrs[] = {
        &dev_attr_gt_act_freq_mhz.attr,
        &dev_attr_gt_cur_freq_mhz.attr,
+       &dev_attr_gt_boost_freq_mhz.attr,
        &dev_attr_gt_max_freq_mhz.attr,
        &dev_attr_gt_min_freq_mhz.attr,
        &dev_attr_gt_RP0_freq_mhz.attr,
 static const struct attribute *vlv_attrs[] = {
        &dev_attr_gt_act_freq_mhz.attr,
        &dev_attr_gt_cur_freq_mhz.attr,
+       &dev_attr_gt_boost_freq_mhz.attr,
        &dev_attr_gt_max_freq_mhz.attr,
        &dev_attr_gt_min_freq_mhz.attr,
        &dev_attr_gt_RP0_freq_mhz.attr,