/* encounter unknown syscall, continue */
gdb_connection->frontend_state = TARGET_RUNNING;
- target_resume(target, 1, 0x0, 0, 0);
+ target_resume(target, true, 0x0, false, false);
return;
}
if (program_exited) {
/* Use target_resume() to let target run its own exit syscall handler. */
gdb_connection->frontend_state = TARGET_RUNNING;
- target_resume(target, 1, 0x0, 0, 0);
+ target_resume(target, true, 0x0, false, false);
} else {
gdb_connection->frontend_state = TARGET_HALTED;
rtos_update_threads(target);
char const *packet, int packet_size)
{
struct target *target = get_target_from_connection(connection);
- int current = 0;
+ bool current = false;
uint64_t address = 0x0;
int retval = ERROR_OK;
if (packet_size > 1)
address = strtoull(packet + 1, NULL, 16);
else
- current = 1;
+ current = true;
gdb_running_type = packet[0];
if (packet[0] == 'c') {
LOG_DEBUG("continue");
/* resume at current address, don't handle breakpoints, not debugging */
- retval = target_resume(target, current, address, 0, 0);
+ retval = target_resume(target, current, address, false, false);
} else if (packet[0] == 's') {
LOG_DEBUG("step");
/* step at current or address, don't handle breakpoints */
- retval = target_step(target, current, address, 0);
+ retval = target_step(target, current, address, false);
}
return retval;
}
gdb_running_type = 'c';
LOG_TARGET_DEBUG(target, "target continue");
gdb_connection->output_flag = GDB_OUTPUT_ALL;
- retval = target_resume(target, 1, 0, 0, 0);
+ retval = target_resume(target, true, 0, false, false);
if (retval == ERROR_TARGET_NOT_HALTED)
LOG_TARGET_INFO(target, "target was not halted when resume was requested");
bool fake_step = false;
struct target *ct = target;
- int current_pc = 1;
+ bool current_pc = true;
int64_t thread_id;
parse++;
if (parse[0] == ':') {
return true;
}
- retval = target_step(ct, current_pc, 0, 0);
+ retval = target_step(ct, current_pc, 0, false);
if (retval == ERROR_TARGET_NOT_HALTED)
LOG_TARGET_INFO(ct, "target was not halted when step was requested");
/* After File-I/O ends, keep continue or step */
if (gdb_running_type == 'c')
- retval = target_resume(target, 1, 0x0, 0, 0);
+ retval = target_resume(target, true, 0x0, false, false);
else if (gdb_running_type == 's')
- retval = target_step(target, 1, 0x0, 0);
+ retval = target_step(target, true, 0x0, false);
else
retval = ERROR_FAIL;
return aarch64_halt_one(target, HALT_SYNC);
}
-static int aarch64_restore_one(struct target *target, int current,
- uint64_t *address, int handle_breakpoints, int debug_execution)
+static int aarch64_restore_one(struct target *target, bool current,
+ uint64_t *address, bool handle_breakpoints, bool debug_execution)
{
struct armv8_common *armv8 = target_to_armv8(target);
struct arm *arm = &armv8->arm;
if (!debug_execution)
target_free_all_working_areas(target);
- /* current =
1: continue on current pc, otherwise continue at <address> */
+ /* current =
true: continue on current pc, otherwise continue at <address> */
resume_pc = buf_get_u64(arm->pc->value, 0, 64);
if (!current)
resume_pc = *address;
/*
* prepare all but the current target for restart
*/
-static int aarch64_prep_restart_smp(struct target *target, int handle_breakpoints, struct target **p_first)
+static int aarch64_prep_restart_smp(struct target *target,
+ bool handle_breakpoints, struct target **p_first)
{
int retval = ERROR_OK;
struct target_list *head;
continue;
/* resume at current address, not in step mode */
- retval = aarch64_restore_one(curr, 1, &address, handle_breakpoints, 0);
+ retval = aarch64_restore_one(curr, true, &address, handle_breakpoints,
+ false);
if (retval == ERROR_OK)
retval = aarch64_prepare_restart_one(curr);
if (retval != ERROR_OK) {
LOG_DEBUG("%s", target_name(target));
- retval = aarch64_prep_restart_smp(target, 0, &first);
+ retval = aarch64_prep_restart_smp(target, false, &first);
if (retval != ERROR_OK)
return retval;
return retval;
}
-static int aarch64_resume(struct target *target, int current,
- target_addr_t address, int handle_breakpoints, int debug_execution)
+static int aarch64_resume(struct target *target, bool current,
+ target_addr_t address, bool handle_breakpoints, bool debug_execution)
{
int retval = 0;
uint64_t addr = address;
/*
* single-step a target
*/
-static int aarch64_step(struct target *target, int current, target_addr_t address,
- int handle_breakpoints)
+static int aarch64_step(struct target *target, bool current, target_addr_t address,
+ bool handle_breakpoints)
{
struct armv8_common *armv8 = target_to_armv8(target);
struct aarch64_common *aarch64 = target_to_aarch64(target);
if (retval != ERROR_OK)
return retval;
- if (target->smp && (current == 1)) {
+ if (target->smp && current) {
/*
* isolate current target so that it doesn't get resumed
* together with the others
}
/* all other targets running, restore and restart the current target */
- retval = aarch64_restore_one(target, current, &address, 0, 0);
+ retval = aarch64_restore_one(target, current, &address, false, false);
if (retval == ERROR_OK)
retval = aarch64_restart_one(target, RESTART_LAZY);
/* Resume the target and continue from the current
* PC register value. */
LOG_TARGET_DEBUG(target, "Starting CPU execution after reset");
- CHECK_RETVAL(target_resume(target, 1, 0, 0, 0));
+ CHECK_RETVAL(target_resume(target, true, 0, false, false));
}
target->state = TARGET_RESET;
return retval;
}
-static int arc_enable_interrupts(struct target *target, int enable)
+static int arc_enable_interrupts(struct target *target, bool enable)
{
uint32_t value;
return ERROR_OK;
}
-static int arc_resume(struct target *target, int current, target_addr_t address,
- int handle_breakpoints, int debug_execution)
+static int arc_resume(struct target *target, bool current, target_addr_t address,
+ bool handle_breakpoints, bool debug_execution)
{
struct arc_common *arc = target_to_arc(target);
uint32_t resume_pc = 0;
CHECK_RETVAL(arc_enable_watchpoints(target));
}
- /* current =
1: continue on current PC, otherwise continue at <address> */
+ /* current =
true: continue on current PC, otherwise continue at <address> */
if (!current) {
target_buffer_set_u32(target, pc->value, address);
pc->dirty = true;
/* Helper function which switches core to single_step mode by
* doing aux r/w operations. */
-static int arc_config_step(struct target *target, int enable_step)
+static int arc_config_step(struct target *target, bool enable_step)
{
uint32_t value;
CHECK_RETVAL(arc_debug_entry(target));
/* disable interrupts while stepping */
- CHECK_RETVAL(arc_enable_interrupts(target, 0));
+ CHECK_RETVAL(arc_enable_interrupts(target, false));
/* configure single step mode */
- CHECK_RETVAL(arc_config_step(target, 1));
+ CHECK_RETVAL(arc_config_step(target, true));
/* exit debug mode */
CHECK_RETVAL(arc_exit_debug(target));
return ERROR_OK;
}
-static int arc_step(struct target *target, int current, target_addr_t address,
- int handle_breakpoints)
+static int arc_step(struct target *target, bool current, target_addr_t address,
+ bool handle_breakpoints)
{
/* get pointers to arch-specific information */
struct arc_common *arc = target_to_arc(target);
return ERROR_TARGET_NOT_HALTED;
}
- /* current =
1: continue on current pc, otherwise continue at <address> */
+ /* current =
true: continue on current pc, otherwise continue at <address> */
if (!current) {
buf_set_u32(pc->value, 0, 32, address);
pc->dirty = true;
CHECK_RETVAL(target_call_event_callbacks(target, TARGET_EVENT_RESUMED));
/* disable interrupts while stepping */
- CHECK_RETVAL(arc_enable_interrupts(target, 0));
+ CHECK_RETVAL(arc_enable_interrupts(target, false));
/* do a single step */
- CHECK_RETVAL(arc_config_step(target, 1));
+ CHECK_RETVAL(arc_config_step(target, true));
/* make sure we done our step */
alive_sleep(1);
#endif
-static int arm11_step(struct target *target, int current,
- target_addr_t address, int handle_breakpoints);
+static int arm11_step(struct target *target, bool current,
+ target_addr_t address, bool handle_breakpoints);
/** Check and if necessary take control of the system
return ERROR_OK;
}
-static uint32_t arm11_nextpc(struct arm11_common *arm11, int current, uint32_t address)
+static uint32_t arm11_nextpc(struct arm11_common *arm11, bool current,
+ uint32_t address)
{
void *value = arm11->arm.pc->value;
return address;
}
-static int arm11_resume(struct target *target, int current,
- target_addr_t address, int handle_breakpoints, int debug_execution)
+static int arm11_resume(struct target *target, bool current,
+ target_addr_t address, bool handle_breakpoints, bool debug_execution)
{
/* LOG_DEBUG("current %d address %08x handle_breakpoints %d debug_execution %d", */
/* current, address, handle_breakpoints, debug_execution); */
for (bp = target->breakpoints; bp; bp = bp->next) {
if (bp->address == address) {
LOG_DEBUG("must step over %08" TARGET_PRIxADDR "", bp->address);
- arm11_step(target, 1, 0, 0);
+ arm11_step(target, true, 0, false);
break;
}
}
return ERROR_OK;
}
-static int arm11_step(struct target *target, int current,
- target_addr_t address, int handle_breakpoints)
+static int arm11_step(struct target *target, bool current,
+ target_addr_t address, bool handle_breakpoints)
{
LOG_DEBUG("target->state: %s",
target_state_name(target));
/* skip over BKPT */
if ((next_instruction & 0xFFF00070) == 0xe1200070) {
- address = arm11_nextpc(arm11, 0, address + 4);
+ address = arm11_nextpc(arm11, false, address + 4);
LOG_DEBUG("Skipping BKPT %08" TARGET_PRIxADDR, address);
}
/* skip over Wait for interrupt / Standby
* mcr 15, 0, r?, cr7, cr0, {4} */
else if ((next_instruction & 0xFFFF0FFF) == 0xee070f90) {
- address = arm11_nextpc(arm11, 0, address + 4);
+ address = arm11_nextpc(arm11, false, address + 4);
LOG_DEBUG("Skipping WFI %08" TARGET_PRIxADDR, address);
}
/* ignore B to self */
}
int arm7_9_resume(struct target *target,
- int current,
+ bool current,
target_addr_t address,
- int handle_breakpoints,
- int debug_execution)
+ bool handle_breakpoints,
+ bool debug_execution)
{
struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
struct arm *arm = &arm7_9->arm;
if (!debug_execution)
target_free_all_working_areas(target);
- /* current =
1: continue on current pc, otherwise continue at <address> */
+ /* current =
true: continue on current pc, otherwise continue at <address> */
if (!current)
buf_set_u32(arm->pc->value, 0, 32, address);
embeddedice_store_reg(&arm7_9->eice_cache->reg_list[EICE_W1_CONTROL_VALUE]);
}
-int arm7_9_step(struct target *target, int current, target_addr_t address, int handle_breakpoints)
+int arm7_9_step(struct target *target, bool current, target_addr_t address,
+ bool handle_breakpoints)
{
struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
struct arm *arm = &arm7_9->arm;
return ERROR_TARGET_NOT_HALTED;
}
- /* current =
1: continue on current pc, otherwise continue at <address> */
+ /* current =
true: continue on current pc, otherwise continue at <address> */
if (!current)
buf_set_u32(arm->pc->value, 0, 32, address);
int arm7_9_soft_reset_halt(struct target *target);
int arm7_9_halt(struct target *target);
-int arm7_9_resume(struct target *target, int current, target_addr_t address,
- int handle_breakpoints, int debug_execution);
-int arm7_9_step(struct target *target, int current, target_addr_t address,
- int handle_breakpoints);
+int arm7_9_resume(struct target *target, bool current, target_addr_t address,
+ bool handle_breakpoints, bool debug_execution);
+int arm7_9_step(struct target *target, bool current, target_addr_t address,
+ bool handle_breakpoints);
int arm7_9_read_memory(struct target *target, target_addr_t address,
uint32_t size, uint32_t count, uint8_t *buffer);
int arm7_9_write_memory(struct target *target, target_addr_t address,
if (is_armv8(target_to_armv8(target))) {
struct armv8_common *armv8 = target_to_armv8(target);
if (armv8->last_run_control_op == ARMV8_RUNCONTROL_RESUME) {
- *retval = target_resume(target, 1, 0, 0, 0);
+ *retval = target_resume(target, true, 0, false, false);
if (*retval != ERROR_OK) {
LOG_ERROR("Failed to resume target");
return 0;
} else if (armv8->last_run_control_op == ARMV8_RUNCONTROL_STEP)
target->debug_reason = DBG_REASON_SINGLESTEP;
} else {
- *retval = target_resume(target, 1, 0, 0, 0);
+ *retval = target_resume(target, true, 0, false, false);
if (*retval != ERROR_OK) {
LOG_ERROR("Failed to resume target");
return 0;
}
}
- retval = target_resume(target, 0, entry_point, 1, 1);
+ retval = target_resume(target, false, entry_point, true, true);
if (retval != ERROR_OK)
return retval;
retval = run_it(target, exit_point, timeout_ms, arch_info);
/* save previous core mode */
armv7m_algorithm_info->core_mode = core_mode;
- retval = target_resume(target, 0, entry_point, 1, 1);
+ retval = target_resume(target, false, entry_point, true, true);
return retval;
}
return ERROR_OK;
}
-static int avr32_ap7k_resume(struct target *target, int current,
- target_addr_t address, int handle_breakpoints, int debug_execution)
+static int avr32_ap7k_resume(struct target *target, bool current,
+ target_addr_t address, bool handle_breakpoints, bool debug_execution)
{
struct avr32_ap7k_common *ap7k = target_to_ap7k(target);
struct breakpoint *breakpoint = NULL;
*/
}
- /* current =
1: continue on current pc, otherwise continue at <address> */
+ /* current =
true: continue on current pc, otherwise continue at <address> */
if (!current) {
#if 0
if (retval != ERROR_OK)
return ERROR_OK;
}
-static int avr32_ap7k_step(struct target *target, int current,
- target_addr_t address, int handle_breakpoints)
+static int avr32_ap7k_step(struct target *target, bool current,
+ target_addr_t address, bool handle_breakpoints)
{
LOG_ERROR("%s: implement me", __func__);
static int avr_arch_state(struct target *target);
static int avr_poll(struct target *target);
static int avr_halt(struct target *target);
-static int avr_resume(struct target *target, int current, target_addr_t address,
- int handle_breakpoints, int debug_execution);
-static int avr_step(struct target *target, int current, target_addr_t address,
- int handle_breakpoints);
+static int avr_resume(struct target *target, bool current, target_addr_t address,
+ bool handle_breakpoints, bool debug_execution);
+static int avr_step(struct target *target, bool current, target_addr_t address,
+ bool handle_breakpoints);
static int avr_assert_reset(struct target *target);
static int avr_deassert_reset(struct target *target);
return ERROR_OK;
}
-static int avr_resume(struct target *target, int current, target_addr_t address,
- int handle_breakpoints, int debug_execution)
+static int avr_resume(struct target *target, bool current, target_addr_t address,
+ bool handle_breakpoints, bool debug_execution)
{
LOG_DEBUG("%s", __func__);
return ERROR_OK;
}
-static int avr_step(struct target *target, int current, target_addr_t address, int handle_breakpoints)
+static int avr_step(struct target *target, bool current, target_addr_t address,
+ bool handle_breakpoints)
{
LOG_DEBUG("%s", __func__);
return ERROR_OK;
return ERROR_OK;
}
-static int cortex_a_internal_restore(struct target *target, int current,
- target_addr_t *address, int handle_breakpoints, int debug_execution)
+static int cortex_a_internal_restore(struct target *target, bool current,
+ target_addr_t *address, bool handle_breakpoints, bool debug_execution)
{
struct armv7a_common *armv7a = target_to_armv7a(target);
struct arm *arm = &armv7a->arm;
}
#endif
- /* current =
1: continue on current pc, otherwise continue at <address> */
+ /* current =
true: continue on current pc, otherwise continue at <address> */
resume_pc = buf_get_u32(arm->pc->value, 0, 32);
if (!current)
resume_pc = *address;
return ERROR_OK;
}
-static int cortex_a_restore_smp(struct target *target, int handle_breakpoints)
+static int cortex_a_restore_smp(struct target *target, bool handle_breakpoints)
{
int retval = 0;
struct target_list *head;
if ((curr != target) && (curr->state != TARGET_RUNNING)
&& target_was_examined(curr)) {
/* resume current address , not in step mode */
- retval += cortex_a_internal_restore(curr, 1, &address,
- handle_breakpoints, 0);
+ retval += cortex_a_internal_restore(curr, true, &address,
+ handle_breakpoints, false);
retval += cortex_a_internal_restart(curr);
}
}
return retval;
}
-static int cortex_a_resume(struct target *target, int current,
- target_addr_t address, int handle_breakpoints, int debug_execution)
+static int cortex_a_resume(struct target *target, bool current,
+ target_addr_t address, bool handle_breakpoints, bool debug_execution)
{
int retval = 0;
/* dummy resume for smp toggle in order to reduce gdb impact */
target_call_event_callbacks(target, TARGET_EVENT_RESUMED);
return 0;
}
- cortex_a_internal_restore(target, current, &address, handle_breakpoints, debug_execution);
+ cortex_a_internal_restore(target, current, &address, handle_breakpoints,
+ debug_execution);
if (target->smp) {
target->gdb_service->core[0] = -1;
retval = cortex_a_restore_smp(target, handle_breakpoints);
return retval;
}
-static int cortex_a_step(struct target *target, int current, target_addr_t address,
- int handle_breakpoints)
+static int cortex_a_step(struct target *target, bool current, target_addr_t address,
+ bool handle_breakpoints)
{
struct cortex_a_common *cortex_a = target_to_cortex_a(target);
struct armv7a_common *armv7a = target_to_armv7a(target);
return ERROR_TARGET_NOT_HALTED;
}
- /* current =
1: continue on current pc, otherwise continue at <address> */
+ /* current =
true: continue on current pc, otherwise continue at <address> */
r = arm->pc;
if (!current)
buf_set_u32(r->value, 0, 32, address);
* But since Cortex-A uses breakpoint for single step,
* we MUST handle breakpoints.
*/
- handle_breakpoints = 1;
+ handle_breakpoints = true;
if (handle_breakpoints) {
breakpoint = breakpoint_find(target, address);
if (breakpoint)
target->debug_reason = DBG_REASON_SINGLESTEP;
- retval = cortex_a_resume(target, 1, address, 0, 0);
+ retval = cortex_a_resume(target, true, address, false, false);
if (retval != ERROR_OK)
return retval;
r->valid = true;
}
- /* current =
1: continue on current pc, otherwise continue at <address> */
+ /* current =
true: continue on current pc, otherwise continue at <address> */
r = armv7m->arm.pc;
if (!current) {
buf_set_u32(r->value, 0, 32, *address);
continue;
int retval = cortex_m_restore_one(curr, true, &address,
- handle_breakpoints, false);
+ handle_breakpoints, false);
if (retval != ERROR_OK)
return retval;
return ERROR_OK;
}
-static int cortex_m_resume(struct target *target, int current,
- target_addr_t address, int handle_breakpoints, int debug_execution)
+static int cortex_m_resume(struct target *target, bool current,
+ target_addr_t address, bool handle_breakpoints, bool debug_execution)
{
- int retval = cortex_m_restore_one(target, !!current, &address, !!handle_breakpoints, !!debug_execution);
+ int retval = cortex_m_restore_one(target, current, &address,
+ handle_breakpoints, debug_execution);
if (retval != ERROR_OK) {
LOG_TARGET_ERROR(target, "context restore failed, aborting resume");
return retval;
}
if (target->smp && !debug_execution) {
- retval = cortex_m_restore_smp(target, !!handle_breakpoints);
+ retval = cortex_m_restore_smp(target, handle_breakpoints);
if (retval != ERROR_OK)
LOG_TARGET_WARNING(target, "resume of a SMP target failed, trying to resume current one");
}
- cortex_m_restart_one(target, !!debug_execution);
+ cortex_m_restart_one(target, debug_execution);
if (retval != ERROR_OK) {
LOG_TARGET_ERROR(target, "resume failed");
return retval;
}
/* int irqstepcount = 0; */
-static int cortex_m_step(struct target *target, int current,
- target_addr_t address, int handle_breakpoints)
+static int cortex_m_step(struct target *target, bool current,
+ target_addr_t address, bool handle_breakpoints)
{
struct cortex_m_common *cortex_m = target_to_cm(target);
struct armv7m_common *armv7m = &cortex_m->armv7m;
if (target->smp && target->gdb_service)
target->gdb_service->target = target;
- /* current =
1: continue on current pc, otherwise continue at <address> */
+ /* current =
true: continue on current pc, otherwise continue at <address> */
if (!current) {
buf_set_u32(pc->value, 0, 32, address);
pc->dirty = true;
/* Make sure the target is running */
target_poll(target);
if (target->state == TARGET_HALTED)
- retval = target_resume(target, 1, 0, 0, 0);
+ retval = target_resume(target, true, 0, false, false);
if (retval != ERROR_OK) {
LOG_TARGET_ERROR(target, "Error while resuming target");
}
static int dsp563xx_resume(struct target *target,
- int current,
+ bool current,
target_addr_t address,
- int handle_breakpoints,
- int debug_execution)
+ bool handle_breakpoints,
+ bool debug_execution)
{
int err;
struct dsp563xx_common *dsp563xx = target_to_dsp563xx(target);
if (current && dsp563xx->core_cache->reg_list[DSP563XX_REG_IDX_PC].dirty) {
dsp563xx_write_core_reg(target, DSP563XX_REG_IDX_PC);
address = dsp563xx->core_regs[DSP563XX_REG_IDX_PC];
- current = 0;
+ current = false;
}
LOG_DEBUG("%s %08X %08" TARGET_PRIXADDR, __func__, current, address);
}
static int dsp563xx_step_ex(struct target *target,
- int current,
+ bool current,
uint32_t address,
- int handle_breakpoints,
+ bool handle_breakpoints,
int steps)
{
int err;
if (current && dsp563xx->core_cache->reg_list[DSP563XX_REG_IDX_PC].dirty) {
dsp563xx_write_core_reg(target, DSP563XX_REG_IDX_PC);
address = dsp563xx->core_regs[DSP563XX_REG_IDX_PC];
- current = 0;
+ current = false;
}
LOG_DEBUG("%s %08X %08" PRIX32, __func__, current, address);
}
static int dsp563xx_step(struct target *target,
- int current,
+ bool current,
target_addr_t address,
- int handle_breakpoints)
+ bool handle_breakpoints)
{
int err;
struct dsp563xx_common *dsp563xx = target_to_dsp563xx(target);
* reset vector and need 2 cycles to fill
* the cache (fetch,decode,execute)
*/
- err = dsp563xx_step_ex(target, 1, 0, 1, 1);
+ err = dsp563xx_step_ex(target, true, 0, true, 1);
if (err != ERROR_OK)
return err;
}
}
/* exec */
- retval = target_resume(target, 0, entry_point, 1, 1);
+ retval = target_resume(target, false, entry_point, true, true);
if (retval != ERROR_OK)
return retval;
if (err == ERROR_OK && was_running) {
/* Resume from current PC */
- err = dsp563xx_resume(target, 1, 0x0, 0, 0);
+ err = dsp563xx_resume(target, true, 0x0, false, false);
}
return err;
return ERROR_OK;
}
-static int dsp5680xx_resume(struct target *target, int current,
- target_addr_t address, int hb, int d)
+static int dsp5680xx_resume(struct target *target, bool current,
+ target_addr_t address, bool handle_breakpoints, bool debug_execution)
{
if (target->state == TARGET_RUNNING) {
LOG_USER("Target already running.");
retval = core_tx_upper_data(target, tmp, &drscan_data);
err_check_propagate(retval);
- retval = dsp5680xx_resume(target, 0, ram_addr, 0, 0);
+ retval = dsp5680xx_resume(target, false, ram_addr, false, false);
err_check_propagate(retval);
int counter = FLUSH_COUNT_FLASH;
return retval;
}
-static int dsp5680xx_step(struct target *target, int current, target_addr_t address,
- int handle_breakpoints)
+static int dsp5680xx_step(struct target *target, bool current, target_addr_t address,
+ bool handle_breakpoints)
{
err_check(ERROR_FAIL, DSP5680XX_ERROR_NOT_IMPLEMENTED_STEP,
"Not implemented yet.");
return ERROR_OK;
}
-static int esirisc_resume_or_step(struct target *target, int current, target_addr_t address,
- int handle_breakpoints, int debug_execution, bool step)
+static int esirisc_resume_or_step(struct target *target, bool current,
+ target_addr_t address, bool handle_breakpoints, bool debug_execution,
+ bool step)
{
struct esirisc_common *esirisc = target_to_esirisc(target);
struct esirisc_jtag *jtag_info = &esirisc->jtag_info;
return ERROR_OK;
}
-static int esirisc_resume(struct target *target, int current, target_addr_t address,
- int handle_breakpoints, int debug_execution)
+static int esirisc_resume(struct target *target, bool current,
+ target_addr_t address, bool handle_breakpoints, bool debug_execution)
{
LOG_TARGET_DEBUG(target, "-");
handle_breakpoints, debug_execution, false);
}
-static int esirisc_step(struct target *target, int current, target_addr_t address,
- int handle_breakpoints)
+static int esirisc_step(struct target *target, bool current,
+ target_addr_t address, bool handle_breakpoints)
{
LOG_TARGET_DEBUG(target, "-");
return esirisc_resume_or_step(target, current, address,
- handle_breakpoints, 0, true);
+ handle_breakpoints, false, true);
}
static int esirisc_debug_step(struct target *target)
LOG_DEBUG("Resuming the target");
xtensa = target_to_xtensa(target);
xtensa->suppress_dsr_errors = true;
- res = xtensa_resume(target, 0, ESP32_RTC_SLOW_MEM_BASE + 4, 0, 0);
+ res = xtensa_resume(target, false, ESP32_RTC_SLOW_MEM_BASE + 4, false,
+ false);
xtensa->suppress_dsr_errors = false;
if (res != ERROR_OK) {
LOG_ERROR("Failed to run stub (%d)!", res);
}
while (stat) {
/* allow this CPU to leave ERI write critical section */
- res = target_resume(ctx->cpus[k], 1, 0, 1, 0);
+ res = target_resume(ctx->cpus[k], true, 0, true, false);
if (res != ERROR_OK) {
LOG_ERROR("Failed to resume target (%d)!", res);
breakpoint_remove(ctx->cpus[k], bp_addr);
/* in SMP mode we need to call target_resume for one core only */
continue;
}
- res = target_resume(ctx->cpus[k], 1, 0, 1, 0);
+ res = target_resume(ctx->cpus[k], true, 0, true, false);
if (res != ERROR_OK) {
command_print(ctx->cmd, "Failed to resume target (%d)!", res);
return res;
/* in SMP mode we need to call target_resume for one core only */
continue;
}
- res = target_resume(ctx->cpus[k], 1, 0, 1, 0);
+ res = target_resume(ctx->cpus[k], true, 0, true, false);
if (res != ERROR_OK) {
LOG_ERROR("sysview: Failed to resume target '%s' (%d)!", target_name(ctx->cpus[k]), res);
return res;
return ret;
}
-static int esp32s2_step(struct target *target, int current, target_addr_t address, int handle_breakpoints)
+static int esp32s2_step(struct target *target, bool current,
+ target_addr_t address, bool handle_breakpoints)
{
int ret = xtensa_step(target, current, address, handle_breakpoints);
if (ret == ERROR_OK) {
if (ret == ERROR_OK && esp_xtensa->semihost.need_resume) {
esp_xtensa->semihost.need_resume = false;
/* Resume xtensa_resume will handle BREAK instruction. */
- ret = target_resume(target, 1, 0, 1, 0);
+ ret = target_resume(target, true, 0, true, false);
if (ret != ERROR_OK) {
LOG_ERROR("Failed to resume target");
return ret;
LOG_DEBUG("Resuming the target");
xtensa = target_to_xtensa(target);
xtensa->suppress_dsr_errors = true;
- res = xtensa_resume(target, 0, ESP32_S3_RTC_SLOW_MEM_BASE + 4, 0, 0);
+ res = xtensa_resume(target, false, ESP32_S3_RTC_SLOW_MEM_BASE + 4, false,
+ false);
xtensa->suppress_dsr_errors = false;
if (res != ERROR_OK) {
LOG_ERROR("Failed to run stub (%d)!", res);
/* Make sure the target is running */
target_poll(target);
if (target->state == TARGET_HALTED)
- retval = target_resume(target, 1, 0, 0, 0);
+ retval = target_resume(target, true, 0, false, false);
if (retval != ERROR_OK) {
LOG_TARGET_ERROR(target, "Error while resuming target");
!esp_xtensa_smp->other_core_does_resume) {
esp_xtensa->semihost.need_resume = false;
/* Resume xtensa_resume will handle BREAK instruction. */
- ret = target_resume(target, 1, 0, 1, 0);
+ ret = target_resume(target, true, 0, true, false);
if (ret != ERROR_OK) {
LOG_ERROR("Failed to resume target");
return ret;
/* check whether any core polled by esp_xtensa_smp_update_halt_gdb() requested resume */
if (target->smp && other_core_resume_req) {
/* Resume xtensa_resume will handle BREAK instruction. */
- ret = target_resume(target, 1, 0, 1, 0);
+ ret = target_resume(target, true, 0, true, false);
if (ret != ERROR_OK) {
LOG_ERROR("Failed to resume target");
return ret;
}
static int esp_xtensa_smp_resume_cores(struct target *target,
- int handle_breakpoints,
- int debug_execution)
+ bool handle_breakpoints, bool debug_execution)
{
struct target_list *head;
struct target *curr;
if ((curr != target) && (curr->state != TARGET_RUNNING) && target_was_examined(curr)) {
/* resume current address, not in SMP mode */
curr->smp = 0;
- int res = esp_xtensa_smp_resume(curr, 1, 0, handle_breakpoints, debug_execution);
+ int res = esp_xtensa_smp_resume(curr, true, 0, handle_breakpoints, debug_execution);
curr->smp = 1;
if (res != ERROR_OK)
return res;
}
int esp_xtensa_smp_resume(struct target *target,
- int current,
+ bool current,
target_addr_t address,
- int handle_breakpoints,
- int debug_execution)
+ bool handle_breakpoints,
+ bool debug_execution)
{
int res;
uint32_t smp_break;
}
int esp_xtensa_smp_step(struct target *target,
- int current,
+ bool current,
target_addr_t address,
- int handle_breakpoints)
+ bool handle_breakpoints)
{
int res;
uint32_t smp_break = 0;
int esp_xtensa_smp_poll(struct target *target);
int esp_xtensa_smp_resume(struct target *target,
- int current,
+ bool current,
target_addr_t address,
- int handle_breakpoints,
- int debug_execution);
+ bool handle_breakpoints,
+ bool debug_execution);
int esp_xtensa_smp_step(struct target *target,
- int current,
+ bool current,
target_addr_t address,
- int handle_breakpoints);
+ bool handle_breakpoints);
int esp_xtensa_smp_assert_reset(struct target *target);
int esp_xtensa_smp_deassert_reset(struct target *target);
int esp_xtensa_smp_soft_reset_halt(struct target *target);
arm->core_state = ARM_STATE_ARM;
embeddedice_write_reg(&arm7_9->eice_cache->reg_list[EICE_COMMS_DATA], 0);
- arm7_9_resume(target, 0, arm7_9->dcc_working_area->address, 1, 1);
+ arm7_9_resume(target, false, arm7_9->dcc_working_area->address, true, true);
/* send data over */
x = 0;
target->SAVED_DCRDR = 0; /* clear both DCC busy bits on initial resume */
- return target->reset_halt ? ERROR_OK : target_resume(target, 1, 0, 0, 0);
+ return target->reset_halt ? ERROR_OK : target_resume(target, true, 0, false,
+ false);
}
static int adapter_halt(struct target *target)
return ERROR_OK;
}
-static int adapter_resume(struct target *target, int current,
- target_addr_t address, int handle_breakpoints,
- int debug_execution)
+static int adapter_resume(struct target *target, bool current,
+ target_addr_t address, bool handle_breakpoints,
+ bool debug_execution)
{
int res;
struct hl_interface *adapter = target_to_adapter(target);
return ERROR_OK;
}
-static int adapter_step(struct target *target, int current,
- target_addr_t address, int handle_breakpoints)
+static int adapter_step(struct target *target, bool current,
+ target_addr_t address, bool handle_breakpoints)
{
int res;
struct hl_interface *adapter = target_to_adapter(target);
}
}
-int lakemont_resume(struct target *t, int current, target_addr_t address,
- int handle_breakpoints, int debug_execution)
+int lakemont_resume(struct target *t, bool current, target_addr_t address,
+ bool handle_breakpoints, bool debug_execution)
{
struct breakpoint *bp = NULL;
struct x86_32_common *x86_32 = target_to_x86_32(t);
bp = breakpoint_find(t, eip);
if (bp /*&& bp->type == BKPT_SOFT*/) {
/* the step will step over the breakpoint */
- if (lakemont_step(t, 0, 0, 1) != ERROR_OK) {
+ if (lakemont_step(t, false, 0, true) != ERROR_OK) {
LOG_ERROR("%s stepping over a software breakpoint at 0x%08" PRIx32 " "
"failed to resume the target", __func__, eip);
return ERROR_FAIL;
return ERROR_OK;
}
-int lakemont_step(struct target *t, int current,
- target_addr_t address, int handle_breakpoints)
+int lakemont_step(struct target *t, bool current, target_addr_t address,
+ bool handle_breakpoints)
{
struct x86_32_common *x86_32 = target_to_x86_32(t);
uint32_t eflags = buf_get_u32(x86_32->cache->reg_list[EFLAGS].value, 0, 32);
int lakemont_poll(struct target *t);
int lakemont_arch_state(struct target *t);
int lakemont_halt(struct target *t);
-int lakemont_resume(struct target *t, int current, target_addr_t address,
- int handle_breakpoints, int debug_execution);
-int lakemont_step(struct target *t, int current,
- target_addr_t address, int handle_breakpoints);
+int lakemont_resume(struct target *t, bool current, target_addr_t address,
+ bool handle_breakpoints, bool debug_execution);
+int lakemont_step(struct target *t, bool current,
+ target_addr_t address, bool handle_breakpoints);
int lakemont_reset_assert(struct target *t);
int lakemont_reset_deassert(struct target *t);
int lakemont_update_after_probemode_entry(struct target *t);
return ERROR_OK;
}
-static int ls1_sap_resume(struct target *target, int current, target_addr_t address,
- int handle_breakpoints, int debug_execution)
+static int ls1_sap_resume(struct target *target, bool current,
+ target_addr_t address, bool handle_breakpoints, bool debug_execution)
{
LOG_DEBUG("%s", __func__);
return ERROR_OK;
}
-static int ls1_sap_step(struct target *target, int current, target_addr_t address,
- int handle_breakpoints)
+static int ls1_sap_step(struct target *target, bool current,
+ target_addr_t address, bool handle_breakpoints)
{
LOG_DEBUG("%s", __func__);
return ERROR_OK;
return ERROR_OK;
}
-static int mem_ap_resume(struct target *target, int current, target_addr_t address,
- int handle_breakpoints, int debug_execution)
+static int mem_ap_resume(struct target *target, bool current,
+ target_addr_t address, bool handle_breakpoints,
+ bool debug_execution)
{
LOG_TARGET_DEBUG(target, "%s", __func__);
target->state = TARGET_RUNNING;
return ERROR_OK;
}
-static int mem_ap_step(struct target *target, int current, target_addr_t address,
- int handle_breakpoints)
+static int mem_ap_step(struct target *target, bool current,
+ target_addr_t address, bool handle_breakpoints)
{
LOG_TARGET_DEBUG(target, "%s", __func__);
target->state = TARGET_HALTED;
int retval;
/* This code relies on the target specific resume() and poll()->debug_entry()
* sequence to write register values to the processor and the read them back */
- retval = target_resume(target, 0, entry_point, 0, 1);
+ retval = target_resume(target, false, entry_point, false, true);
if (retval != ERROR_OK)
return retval;
struct breakpoint *breakpoint);
static int mips_m4k_unset_breakpoint(struct target *target,
struct breakpoint *breakpoint);
-static int mips_m4k_internal_restore(struct target *target, int current,
- target_addr_t address, int handle_breakpoints,
- int debug_execution);
+static int mips_m4k_internal_restore(struct target *target, bool current,
+ target_addr_t address, bool handle_breakpoints,
+ bool debug_execution);
static int mips_m4k_halt(struct target *target);
static int mips_m4k_bulk_write_memory(struct target *target, target_addr_t address,
uint32_t count, const uint8_t *buffer);
return ERROR_OK;
}
-static int mips_m4k_restore_smp(struct target *target, uint32_t address, int handle_breakpoints)
+static int mips_m4k_restore_smp(struct target *target, uint32_t address,
+ bool handle_breakpoints)
{
int retval = ERROR_OK;
struct target_list *head;
struct target *curr = head->target;
if ((curr != target) && (curr->state != TARGET_RUNNING)) {
/* resume current address , not in step mode */
- ret = mips_m4k_internal_restore(curr, 1, address,
- handle_breakpoints, 0);
+ ret = mips_m4k_internal_restore(curr, true, address,
+ handle_breakpoints, false);
if (ret != ERROR_OK) {
LOG_TARGET_ERROR(curr, "failed to resume at address: 0x%" PRIx32,
return retval;
}
-static int mips_m4k_internal_restore(struct target *target, int current,
- target_addr_t address, int handle_breakpoints, int debug_execution)
+static int mips_m4k_internal_restore(struct target *target, bool current,
+ target_addr_t address, bool handle_breakpoints,
+ bool debug_execution)
{
struct mips32_common *mips32 = target_to_mips32(target);
struct mips_ejtag *ejtag_info = &mips32->ejtag_info;
mips_m4k_enable_watchpoints(target);
}
- /* current =
1: continue on current pc, otherwise continue at <address> */
+ /* current =
true: continue on current pc, otherwise continue at <address> */
if (!current) {
mips_m4k_isa_filter(mips32->isa_imp, &address);
buf_set_u32(mips32->core_cache->reg_list[MIPS32_REGLIST_C0_PC_INDEX].value, 0, 32, address);
mips32->core_cache->reg_list[MIPS32_REGLIST_C0_PC_INDEX].valid = true;
}
- if ((mips32->isa_imp > 1) && debug_execution) /* if more than one isa supported */
+ if (mips32->isa_imp > 1 && debug_execution) /* if more than one isa supported */
buf_set_u32(mips32->core_cache->reg_list[MIPS32_REGLIST_C0_PC_INDEX].value, 0, 1, mips32->isa_mode);
if (!current)
return ERROR_OK;
}
-static int mips_m4k_resume(struct target *target, int current,
- target_addr_t address, int handle_breakpoints, int debug_execution)
+static int mips_m4k_resume(struct target *target, bool current,
+ target_addr_t address, bool handle_breakpoints, bool debug_execution)
{
int retval = ERROR_OK;
return retval;
}
-static int mips_m4k_step(struct target *target, int current,
- target_addr_t address, int handle_breakpoints)
+static int mips_m4k_step(struct target *target, bool current,
+ target_addr_t address, bool handle_breakpoints)
{
/* get pointers to arch-specific information */
struct mips32_common *mips32 = target_to_mips32(target);
return ERROR_TARGET_NOT_HALTED;
}
- /* current =
1: continue on current pc, otherwise continue at <address> */
+ /* current =
true: continue on current pc, otherwise continue at <address> */
if (!current) {
mips_m4k_isa_filter(mips32->isa_imp, &address);
buf_set_u32(mips32->core_cache->reg_list[MIPS32_REGLIST_C0_PC_INDEX].value, 0, 32, address);
return ERROR_OK;
}
-static int mips_mips64_resume(struct target *target, int current,
- uint64_t address, int handle_breakpoints,
- int debug_execution)
+static int mips_mips64_resume(struct target *target, bool current,
+ uint64_t address, bool handle_breakpoints,
+ bool debug_execution)
{
struct mips64_common *mips64 = target->arch_info;
struct mips_ejtag *ejtag_info = &mips64->ejtag_info;
}
pc = &mips64->core_cache->reg_list[MIPS64_PC];
- /* current =
1: continue on current pc, otherwise continue at <address> */
+ /* current =
true: continue on current pc, otherwise continue at <address> */
if (!current) {
buf_set_u64(pc->value, 0, 64, address);
pc->dirty = true;
return ERROR_OK;
}
-static int mips_mips64_step(struct target *target, int current,
- uint64_t address, int handle_breakpoints)
+static int mips_mips64_step(struct target *target, bool current,
+ uint64_t address, bool handle_breakpoints)
{
struct mips64_common *mips64 = target->arch_info;
struct mips_ejtag *ejtag_info = &mips64->ejtag_info;
if (mips64->mips64mode32)
address = mips64_extend_sign(address);
- /* current = 1: continue on current pc, otherwise continue at
+ /* current = true: continue on current pc, otherwise continue at
* <address> */
if (!current) {
buf_set_u64(pc->value, 0, 64, address);
return false;
}
-static int or1k_resume_or_step(struct target *target, int current,
- uint32_t address, int handle_breakpoints,
- int debug_execution, int step)
+static int or1k_resume_or_step(struct target *target, bool current,
+ uint32_t address, bool handle_breakpoints, bool debug_execution,
+ int step)
{
struct or1k_common *or1k = target_to_or1k(target);
struct or1k_du *du_core = or1k_to_du(or1k);
return ERROR_OK;
}
-static int or1k_resume(struct target *target, int current,
- target_addr_t address, int handle_breakpoints,
- int debug_execution)
+static int or1k_resume(struct target *target, bool current,
+ target_addr_t address, bool handle_breakpoints, bool debug_execution)
{
return or1k_resume_or_step(target, current, address,
handle_breakpoints,
NO_SINGLE_STEP);
}
-static int or1k_step(struct target *target, int current,
- target_addr_t address, int handle_breakpoints)
+static int or1k_step(struct target *target, bool current,
+ target_addr_t address, bool handle_breakpoints)
{
return or1k_resume_or_step(target, current, address,
handle_breakpoints,
- 0,
+ false,
SINGLE_STEP);
}
/* Make sure the target is running */
target_poll(target);
if (target->state == TARGET_HALTED)
- retval = target_resume(target, 1, 0, 0, 0);
+ retval = target_resume(target, true, 0, false, false);
if (retval != ERROR_OK) {
LOG_ERROR("Error while resuming target");
}
/* resume target if reset mode is run */
if (!t->reset_halt) {
- retval = lakemont_resume(t, 1, 0, 0, 0);
+ retval = lakemont_resume(t, true, 0, false, false);
if (retval != ERROR_OK) {
LOG_ERROR("%s could not resume target", __func__);
return retval;
return ERROR_OK;
}
-static int resume(struct target *target, int debug_execution, bool step)
+static int resume(struct target *target, bool debug_execution, bool step)
{
if (debug_execution) {
LOG_ERROR("TODO: debug_execution is true");
return ERROR_OK;
}
-static int step(struct target *target, int current, target_addr_t address,
- int handle_breakpoints)
+static int step(struct target *target, bool current, target_addr_t address,
+ bool handle_breakpoints)
{
jtag_add_ir_scan(target->tap, &select_dbus, TAP_IDLE);
return poll_target(target, true);
}
-static int riscv011_resume(struct target *target, int current,
- target_addr_t address, int handle_breakpoints, int debug_execution)
+static int riscv011_resume(struct target *target, bool current,
+ target_addr_t address, bool handle_breakpoints,
+ bool debug_execution)
{
RISCV_INFO(r);
jtag_add_ir_scan(target->tap, &select_dbus, TAP_IDLE);
return ERROR_FAIL;
}
-
-static int oldriscv_step(struct target *target, int current, uint32_t address,
- int handle_breakpoints)
+static int oldriscv_step(struct target *target, bool current, uint32_t address,
+ bool handle_breakpoints)
{
struct target_type *tt = get_target_type(target);
return tt->step(target, current, address, handle_breakpoints);
}
-static int old_or_new_riscv_step(struct target *target, int current,
- target_addr_t address, int handle_breakpoints)
+static int old_or_new_riscv_step(struct target *target, bool current,
+ target_addr_t address, bool handle_breakpoints)
{
RISCV_INFO(r);
LOG_DEBUG("handle_breakpoints=%d", handle_breakpoints);
return riscv_openocd_step(target, current, address, handle_breakpoints);
}
-
static int riscv_examine(struct target *target)
{
LOG_DEBUG("riscv_examine()");
/**
* Get everything ready to resume.
*/
-static int resume_prep(struct target *target, int current,
- target_addr_t address, int handle_breakpoints, int debug_execution)
+static int resume_prep(struct target *target, bool current,
+ target_addr_t address, bool handle_breakpoints, bool debug_execution)
{
RISCV_INFO(r);
LOG_DEBUG("[%d]", target->coreid);
* Resume all the harts that have been prepped, as close to instantaneous as
* possible.
*/
-static int resume_go(struct target *target, int current,
- target_addr_t address, int handle_breakpoints, int debug_execution)
+static int resume_go(struct target *target, bool current,
+ target_addr_t address, bool handle_breakpoints, bool debug_execution)
{
RISCV_INFO(r);
int result;
*/
static int riscv_resume(
struct target *target,
- int current,
+ bool current,
target_addr_t address,
- int handle_breakpoints,
- int debug_execution,
+ bool handle_breakpoints,
+ bool debug_execution,
bool single_hart)
{
LOG_DEBUG("handle_breakpoints=%d", handle_breakpoints);
return result;
}
-static int riscv_target_resume(struct target *target, int current, target_addr_t address,
- int handle_breakpoints, int debug_execution)
+static int riscv_target_resume(struct target *target, bool current,
+ target_addr_t address, bool handle_breakpoints, bool debug_execution)
{
return riscv_resume(target, current, address, handle_breakpoints,
debug_execution, false);
/* Run algorithm */
LOG_DEBUG("resume at 0x%" TARGET_PRIxADDR, entry_point);
- if (riscv_resume(target, 0, entry_point, 0, 0, true) != ERROR_OK)
+ if (riscv_resume(target, false, entry_point, false, false, true) != ERROR_OK)
return ERROR_FAIL;
int64_t start = timeval_ms();
riscv_halt(target);
} else if (should_resume) {
LOG_DEBUG("resume all");
- riscv_resume(target, true, 0, 0, 0, false);
+ riscv_resume(target, true, 0, false, false, false);
}
/* Sample memory if any target is running. */
target_call_event_callbacks(target, TARGET_EVENT_HALTED);
break;
case SEMIHOSTING_HANDLED:
- if (riscv_resume(target, true, 0, 0, 0, false) != ERROR_OK)
+ if (riscv_resume(target, true, 0, false, false, false) != ERROR_OK)
return ERROR_FAIL;
break;
case SEMIHOSTING_ERROR:
return ERROR_OK;
}
-int riscv_openocd_step(struct target *target, int current,
- target_addr_t address, int handle_breakpoints)
+int riscv_openocd_step(struct target *target, bool current,
+ target_addr_t address, bool handle_breakpoints)
{
LOG_DEBUG("stepping rtos hart");
int riscv_openocd_step(
struct target *target,
- int current,
+ bool current,
target_addr_t address,
- int handle_breakpoints
+ bool handle_breakpoints
);
int riscv_openocd_assert_reset(struct target *target);
return ERROR_OK;
}
-static int stm8_resume(struct target *target, int current,
- target_addr_t address, int handle_breakpoints,
- int debug_execution)
+static int stm8_resume(struct target *target, bool current,
+ target_addr_t address, bool handle_breakpoints,
+ bool debug_execution)
{
struct stm8_common *stm8 = target_to_stm8(target);
struct breakpoint *breakpoint = NULL;
stm8_set_hwbreak(target, comparator_list);
}
- /* current = 1: continue on current pc,
+ /* current = true: continue on current pc,
otherwise continue at <address> */
if (!current) {
buf_set_u32(stm8->core_cache->reg_list[STM8_PC].value,
return ERROR_OK;
}
-static int stm8_step(struct target *target, int current,
- target_addr_t address, int handle_breakpoints)
+static int stm8_step(struct target *target, bool current,
+ target_addr_t address, bool handle_breakpoints)
{
LOG_DEBUG("%x " TARGET_ADDR_FMT " %x",
current, address, handle_breakpoints);
return ERROR_TARGET_NOT_HALTED;
}
- /* current =
1: continue on current pc, otherwise continue at <address> */
+ /* current =
true: continue on current pc, otherwise continue at <address> */
if (!current) {
buf_set_u32(stm8->core_cache->reg_list[STM8_PC].value, 0, 32, address);
stm8->core_cache->reg_list[STM8_PC].dirty = true;
/* This code relies on the target specific resume() and
poll()->debug_entry() sequence to write register values to the
processor and the read them back */
- retval = target_resume(target, 0, entry_point, 0, 1);
+ retval = target_resume(target, false, entry_point, false, true);
if (retval != ERROR_OK)
return retval;
* hand the infrastructure for running such helpers might use this
* procedure but rely on hardware breakpoint to detect termination.)
*/
-int target_resume(struct target *target, int current, target_addr_t address,
- int handle_breakpoints, int debug_execution)
+int target_resume(struct target *target, bool current, target_addr_t address,
+ bool handle_breakpoints, bool debug_execution)
{
int retval;
* in the correct order.
*/
bool save_poll_mask = jtag_poll_mask();
- retval = target->type->resume(target, current, address, handle_breakpoints, debug_execution);
+ retval = target->type->resume(target, current, address, handle_breakpoints,
+ debug_execution);
jtag_poll_unmask(save_poll_mask);
if (retval != ERROR_OK)
}
int target_step(struct target *target,
- int current, target_addr_t address, int handle_breakpoints)
+ bool current, target_addr_t address, bool handle_breakpoints)
{
int retval;
uint32_t t = buf_get_u32(reg->value, 0, 32);
samples[sample_count++] = t;
/* current pc, addr = 0, do not handle breakpoints, not debugging */
- retval = target_resume(target, 1, 0, 0, 0);
+ retval = target_resume(target, true, 0, false, false);
target_poll(target);
alive_sleep(10); /* sleep 10ms, i.e. <100 samples/second. */
} else if (target->state == TARGET_RUNNING) {
COMMAND_HANDLER(handle_resume_command)
{
- int current = 1;
+ bool current = true;
if (CMD_ARGC > 1)
return ERROR_COMMAND_SYNTAX_ERROR;
target_addr_t addr = 0;
if (CMD_ARGC == 1) {
COMMAND_PARSE_ADDRESS(CMD_ARGV[0], addr);
- current = 0;
+ current = false;
}
- return target_resume(target, current, addr, 1, 0);
+ return target_resume(target, current, addr, true, false);
}
COMMAND_HANDLER(handle_step_command)
struct target *target = get_current_target(CMD_CTX);
- return target_step(target, current_pc, addr, 1);
+ return target_step(target, current_pc, addr, true);
}
void target_handle_md_output(struct command_invocation *cmd,
} else if (target->state == TARGET_HALTED && !halted_before_profiling) {
/* The target was running before we started and is halted now. Resume
* it, for consistency. */
- retval = target_resume(target, 1, 0, 0, 0);
+ retval = target_resume(target, true, 0, false, false);
if (retval != ERROR_OK) {
free(samples);
return retval;
* yet it is possible to detect error conditions.
*/
int target_poll(struct target *target);
-int target_resume(struct target *target, int current, target_addr_t address,
- int handle_breakpoints, int debug_execution);
+int target_resume(struct target *target, bool current, target_addr_t address,
+ bool handle_breakpoints, bool debug_execution);
int target_halt(struct target *target);
int target_call_event_callbacks(struct target *target, enum target_event event);
int target_call_reset_callbacks(struct target *target, enum target_reset_mode reset_mode);
* This routine is a wrapper for target->type->step.
*/
int target_step(struct target *target,
- int current, target_addr_t address, int handle_breakpoints);
+ bool current, target_addr_t address, bool handle_breakpoints);
/**
* Run an algorithm on the @a target given.
*
/* halt will log a warning, but return ERROR_OK if the target is already halted. */
int (*halt)(struct target *target);
/* See target.c target_resume() for documentation. */
- int (*resume)(struct target *target, int current, target_addr_t address,
- int handle_breakpoints, int debug_execution);
- int (*step)(struct target *target, int current, target_addr_t address,
- int handle_breakpoints);
+ int (*resume)(struct target *target, bool current, target_addr_t address,
+ bool handle_breakpoints, bool debug_execution);
+ int (*step)(struct target *target, bool current, target_addr_t address,
+ bool handle_breakpoints);
/* target reset control. assert reset can be invoked when OpenOCD and
* the target is out of sync.
*
*/
/* forward declarations */
-static int xscale_resume(struct target *, int current,
- target_addr_t address, int handle_breakpoints, int debug_execution);
+static int xscale_resume(struct target *, bool current,
+ target_addr_t address, bool handle_breakpoints, bool debug_execution);
static int xscale_debug_entry(struct target *);
static int xscale_restore_banked(struct target *);
static int xscale_get_reg(struct reg *reg);
* can only happen in fill mode. */
if (xscale->arch_debug_reason == XSCALE_DBG_REASON_TB_FULL) {
if (--xscale->trace.fill_counter > 0)
- xscale_resume(target, 1, 0x0, 1, 0);
+ xscale_resume(target, true, 0x0, true, false);
} else /* entered debug for other reason; reset counter */
xscale->trace.fill_counter = 0;
}
xscale->trace.data = NULL;
}
-static int xscale_resume(struct target *target, int current,
- target_addr_t address, int handle_breakpoints, int debug_execution)
+static int xscale_resume(struct target *target, bool current,
+ target_addr_t address, bool handle_breakpoints, bool debug_execution)
{
struct xscale_common *xscale = target_to_xscale(target);
struct arm *arm = &xscale->arm;
if (retval != ERROR_OK)
return retval;
- /* current =
1: continue on current pc, otherwise continue at <address> */
+ /* current =
true: continue on current pc, otherwise continue at <address> */
if (!current)
buf_set_u32(arm->pc->value, 0, 32, address);
return ERROR_OK;
}
-static int xscale_step_inner(struct target *target, int current,
- uint32_t address, int handle_breakpoints)
+static int xscale_step_inner(struct target *target, bool current,
+ uint32_t address, bool handle_breakpoints)
{
struct xscale_common *xscale = target_to_xscale(target);
struct arm *arm = &xscale->arm;
return ERROR_OK;
}
-static int xscale_step(struct target *target, int current,
- target_addr_t address, int handle_breakpoints)
+static int xscale_step(struct target *target, bool current,
+ target_addr_t address, bool handle_breakpoints)
{
struct arm *arm = target_to_arm(target);
struct breakpoint *breakpoint = NULL;
return ERROR_TARGET_NOT_HALTED;
}
- /* current =
1: continue on current pc, otherwise continue at <address> */
+ /* current =
true: continue on current pc, otherwise continue at <address> */
if (!current)
buf_set_u32(arm->pc->value, 0, 32, address);
target->state = TARGET_HALTED;
/* resume the target */
- xscale_resume(target, 1, 0x0, 1, 0);
+ xscale_resume(target, true, 0x0, true, false);
}
}
}
int xtensa_prepare_resume(struct target *target,
- int current,
+ bool current,
target_addr_t address,
- int handle_breakpoints,
- int debug_execution)
+ bool handle_breakpoints,
+ bool debug_execution)
{
struct xtensa *xtensa = target_to_xtensa(target);
uint32_t bpena = 0;
}
int xtensa_resume(struct target *target,
- int current,
+ bool current,
target_addr_t address,
- int handle_breakpoints,
- int debug_execution)
+ bool handle_breakpoints,
+ bool debug_execution)
{
LOG_TARGET_DEBUG(target, "start");
- int res = xtensa_prepare_resume(target, current, address, handle_breakpoints, debug_execution);
+ int res = xtensa_prepare_resume(target, current, address,
+ handle_breakpoints, debug_execution);
if (res != ERROR_OK) {
LOG_TARGET_ERROR(target, "Failed to prepare for resume!");
return res;
return false;
}
-int xtensa_do_step(struct target *target, int current, target_addr_t address, int handle_breakpoints)
+int xtensa_do_step(struct target *target, bool current, target_addr_t address,
+ bool handle_breakpoints)
{
struct xtensa *xtensa = target_to_xtensa(target);
int res;
/* Now that ICOUNT (LX) or DCR.StepRequest (NX) is set,
* we can resume as if we were going to run
*/
- res = xtensa_prepare_resume(target, current, address, 0, 0);
+ res = xtensa_prepare_resume(target, current, address, false, false);
if (res != ERROR_OK) {
LOG_TARGET_ERROR(target, "Failed to prepare resume for single step");
return res;
return res;
}
-int xtensa_step(struct target *target, int current, target_addr_t address, int handle_breakpoints)
+int xtensa_step(struct target *target, bool current, target_addr_t address,
+ bool handle_breakpoints)
{
int retval = xtensa_do_step(target, current, address, handle_breakpoints);
if (retval != ERROR_OK)
}
}
- return xtensa_resume(target, 0, entry_point, 1, 1);
+ return xtensa_resume(target, false, entry_point, true, true);
}
/** Waits for an algorithm in the target. */
void xtensa_on_poll(struct target *target);
int xtensa_halt(struct target *target);
int xtensa_resume(struct target *target,
- int current,
+ bool current,
target_addr_t address,
- int handle_breakpoints,
- int debug_execution);
+ bool handle_breakpoints,
+ bool debug_execution);
int xtensa_prepare_resume(struct target *target,
- int current,
+ bool current,
target_addr_t address,
- int handle_breakpoints,
- int debug_execution);
+ bool handle_breakpoints,
+ bool debug_execution);
int xtensa_do_resume(struct target *target);
-int xtensa_step(struct target *target, int current, target_addr_t address, int handle_breakpoints);
-int xtensa_do_step(struct target *target, int current, target_addr_t address, int handle_breakpoints);
+int xtensa_step(struct target *target, bool current, target_addr_t address,
+ bool handle_breakpoints);
+int xtensa_do_step(struct target *target, bool current, target_addr_t address,
+ bool handle_breakpoints);
int xtensa_mmu_is_enabled(struct target *target, int *enabled);
int xtensa_read_memory(struct target *target, target_addr_t address, uint32_t size, uint32_t count, uint8_t *buffer);
int xtensa_read_buffer(struct target *target, target_addr_t address, uint32_t count, uint8_t *buffer);
projects / users / borneoa / openocd-next.git / commitdiff