return 35;
 }
 
-static void glk_load_degamma_lut(const struct intel_crtc_state *crtc_state)
+static void glk_load_degamma_lut(const struct intel_crtc_state *crtc_state,
+                                const struct drm_property_blob *blob)
 {
        struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
        struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
+       const struct drm_color_lut *lut = blob->data;
+       int i, lut_size = drm_color_lut_size(blob);
        enum pipe pipe = crtc->pipe;
-       int i, lut_size = INTEL_INFO(dev_priv)->display.color.degamma_lut_size;
-       const struct drm_color_lut *lut = crtc_state->hw.degamma_lut->data;
 
        /*
         * When setting the auto-increment bit, the hardware seems to
 
 static void glk_load_luts(const struct intel_crtc_state *crtc_state)
 {
+       const struct drm_property_blob *degamma_lut = crtc_state->hw.degamma_lut;
        const struct drm_property_blob *gamma_lut = crtc_state->hw.gamma_lut;
        struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
 
         * the degama LUT so that we don't have to reload
         * it every time the pipe CSC is being enabled.
         */
-       if (crtc_state->hw.degamma_lut)
-               glk_load_degamma_lut(crtc_state);
+       if (degamma_lut)
+               glk_load_degamma_lut(crtc_state, degamma_lut);
        else
                glk_load_degamma_lut_linear(crtc_state);
 
 
 static void icl_load_luts(const struct intel_crtc_state *crtc_state)
 {
+       const struct drm_property_blob *degamma_lut = crtc_state->hw.degamma_lut;
        const struct drm_property_blob *gamma_lut = crtc_state->hw.gamma_lut;
        struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
 
-       if (crtc_state->hw.degamma_lut)
-               glk_load_degamma_lut(crtc_state);
+       if (degamma_lut)
+               glk_load_degamma_lut(crtc_state, degamma_lut);
 
        switch (crtc_state->gamma_mode & GAMMA_MODE_MODE_MASK) {
        case GAMMA_MODE_MODE_8BIT: