x86/bugs: rename ssbd_ibrs_selected to ssbd_userspace_selected

The name of ssbd_ibrs_selected referred to how CPUs vulnerable to
Speculative Store Bypass automatically enable the SSB mitigation in
userspace, provided that the CPU is also using IBRS.[*]    However, the
function doesn't test for IBRS, so the name may be confusing, and there
are unusual combinations of options where the function returns true
without IBRS being enabled (say spectre_v2=off and
spec_store_bypass_disable=userspace).

Rename the function, as brought up by Boris.  The new name reflects what
it's testing.  While at it, make it static to match its declaration
because it's not used outside the file.  No functional change.

[*] The rationale is that setting the SPEC_CTRL MSR's SSBD bit in
    addition to the IBRS bit is free.

Suggested-by: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Signed-off-by: Daniel Jordan <daniel.m.jordan@oracle.com>
Reviewed-by: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Reviewed-by: Alexandre Chartre <alexandre.chartre@oracle.com>
(cherry picked from commit 5342c8c0879f2ce6318139baaa3358c4d16f482e)

Orabug: 28271063

Signed-off-by: Anjali Kulkarni <anjali.k.kulkarni@oracle.com>
Reviewed-by: Zhenzhong Duan <zhenzhong.duan@oracle.com>
Signed-off-by: Brian Maly <brian.maly@oracle.com>

diff --git a/arch/x86/kernel/cpu/bugs_64.c b/arch/x86/kernel/cpu/bugs_64.c
index fbad062e87c30d111c239cb648df64ad9c5b6ef9..7ade7cf1ea62b93667f83d3ec5761b23e88a9cd8 100644 (file)
--- a/arch/x86/kernel/cpu/bugs_64.c
+++ b/arch/x86/kernel/cpu/bugs_64.c
@@ -127,7 +127,7 @@ __setup("spectre_v2_heuristics=", spectre_v2_heuristics_setup);
 static void __init spectre_v2_select_mitigation(void);
 static enum ssb_mitigation __init ssb_select_mitigation(void);
 static void __init ssb_init(void);
-static bool ssbd_ibrs_selected(void);
+static bool ssbd_userspace_selected(void);
 static void __init l1tf_select_mitigation(void);
 
 static enum ssb_mitigation ssb_mode = SPEC_STORE_BYPASS_NONE;
@@ -275,7 +275,7 @@ void x86_spec_ctrl_set(u64 val)
                /*
                 * Only two states are allowed - with IBRS or without.
                 */
-               if (ssbd_ibrs_selected()) {
+               if (ssbd_userspace_selected()) {
                        if (val & SPEC_CTRL_IBRS)
                                host = this_cpu_read(x86_spec_ctrl_priv_cpu);
                        else
@@ -754,7 +754,7 @@ static void __init spectre_v2_select_mitigation(void)
                        if (!retp_compiler() /* prefer IBRS over minimal ASM */ ||
                            (retp_compiler() && !retpoline_selected(cmd) &&
                             ((is_skylake_era() && use_ibrs_on_skylake) ||
-                             (ssbd_ibrs_selected() && use_ibrs_with_ssbd)))) {
+                             (ssbd_userspace_selected() && use_ibrs_with_ssbd)))) {
 
                                /* Start the engine! */
                                ibrs_select(&mode);
@@ -803,7 +803,7 @@ out:
 
 #define pr_fmt(fmt)    "Speculative Store Bypass: " fmt
 
-bool ssbd_ibrs_selected(void)
+static bool ssbd_userspace_selected(void)
 {
        return (ssb_mode == SPEC_STORE_BYPASS_USERSPACE);
 }