highbank_clocks_init();
  
-       sp804_clocksource_init(timer_base + 0x20, "timer1");
+       sp804_clocksource_and_sched_clock_init(timer_base + 0x20, "timer1");
        sp804_clockevents_init(timer_base, irq, "timer0");
 +
 +      twd_local_timer_of_register();
  }
  
  static struct sys_timer highbank_timer = {
 
        }
  
        imx_add_imx_sdma("imx31-sdma", MX31_SDMA_BASE_ADDR, MX31_INT_SDMA, &imx31_sdma_pdata);
+ 
+       imx_set_aips(MX31_IO_ADDRESS(MX31_AIPS1_BASE_ADDR));
+       imx_set_aips(MX31_IO_ADDRESS(MX31_AIPS2_BASE_ADDR));
++
 +      platform_device_register_simple("imx31-audmux", 0, imx31_audmux_res,
 +                                      ARRAY_SIZE(imx31_audmux_res));
  }
  #endif /* ifdef CONFIG_SOC_IMX31 */
  
        }
  
        imx_add_imx_sdma("imx35-sdma", MX35_SDMA_BASE_ADDR, MX35_INT_SDMA, &imx35_sdma_pdata);
+ 
+       /* Setup AIPS registers */
+       imx_set_aips(MX35_IO_ADDRESS(MX35_AIPS1_BASE_ADDR));
+       imx_set_aips(MX35_IO_ADDRESS(MX35_AIPS2_BASE_ADDR));
++
 +      /* i.mx35 has the i.mx31 type audmux */
 +      platform_device_register_simple("imx31-audmux", 0, imx35_audmux_res,
 +                                      ARRAY_SIZE(imx35_audmux_res));
  }
  #endif /* ifdef CONFIG_SOC_IMX35 */
 
  
        /* i.mx51 has the i.mx35 type sdma */
        imx_add_imx_sdma("imx35-sdma", MX51_SDMA_BASE_ADDR, MX51_INT_SDMA, &imx51_sdma_pdata);
+ 
+       /* Setup AIPS registers */
+       imx_set_aips(MX51_IO_ADDRESS(MX51_AIPS1_BASE_ADDR));
+       imx_set_aips(MX51_IO_ADDRESS(MX51_AIPS2_BASE_ADDR));
++
 +      /* i.mx51 has the i.mx31 type audmux */
 +      platform_device_register_simple("imx31-audmux", 0, imx51_audmux_res,
 +                                      ARRAY_SIZE(imx51_audmux_res));
  }
  
  void __init imx53_soc_init(void)
  
        /* i.mx53 has the i.mx35 type sdma */
        imx_add_imx_sdma("imx35-sdma", MX53_SDMA_BASE_ADDR, MX53_INT_SDMA, &imx53_sdma_pdata);
+ 
+       /* Setup AIPS registers */
+       imx_set_aips(MX53_IO_ADDRESS(MX53_AIPS1_BASE_ADDR));
+       imx_set_aips(MX53_IO_ADDRESS(MX53_AIPS2_BASE_ADDR));
++
 +      /* i.mx53 has the i.mx31 type audmux */
 +      platform_device_register_simple("imx31-audmux", 0, imx53_audmux_res,
 +                                      ARRAY_SIZE(imx53_audmux_res));
  }
 
  obj-$(CONFIG_ARCH_TEGRA_2x_SOC)               += pinmux-tegra20-tables.o
  obj-$(CONFIG_ARCH_TEGRA_3x_SOC)               += pinmux-tegra30-tables.o
  obj-$(CONFIG_ARCH_TEGRA_3x_SOC)               += board-dt-tegra30.o
 -obj-$(CONFIG_SMP)                       += platsmp.o localtimer.o headsmp.o
+ obj-$(CONFIG_ARCH_TEGRA_3x_SOC)               += tegra30_clocks.o
 +obj-$(CONFIG_SMP)                     += platsmp.o headsmp.o
  obj-$(CONFIG_HOTPLUG_CPU)               += hotplug.o
  obj-$(CONFIG_TEGRA_SYSTEM_DMA)                += dma.o
  obj-$(CONFIG_CPU_FREQ)                  += cpu-tegra.o