drm/amdgpu: reduce the ring size for GFX

Those are way too large.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
index ff99816fb2a85b32ce706f2a79a5d8199c2b1e6f..f7e5f730c02c2e1e9305789f8eadf3ee2cb69971 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
@@ -4414,7 +4414,7 @@ static int gfx_v7_0_sw_init(void *handle)
                ring = &adev->gfx.gfx_ring[i];
                ring->ring_obj = NULL;
                sprintf(ring->name, "gfx");
-               r = amdgpu_ring_init(adev, ring, 128 * 1024,
+               r = amdgpu_ring_init(adev, ring, 1024,
                                     PACKET3(PACKET3_NOP, 0x3FFF), 0xf,
                                     &adev->gfx.eop_irq, AMDGPU_CP_IRQ_GFX_EOP,
                                     AMDGPU_RING_TYPE_GFX);
@@ -4441,7 +4441,7 @@ static int gfx_v7_0_sw_init(void *handle)
                sprintf(ring->name, "comp %d.%d.%d", ring->me, ring->pipe, ring->queue);
                irq_type = AMDGPU_CP_IRQ_COMPUTE_MEC1_PIPE0_EOP + ring->pipe;
                /* type-2 packets are deprecated on MEC, use type-3 instead */
-               r = amdgpu_ring_init(adev, ring, 128 * 1024,
+               r = amdgpu_ring_init(adev, ring, 1024,
                                     PACKET3(PACKET3_NOP, 0x3FFF), 0xf,
                                     &adev->gfx.eop_irq, irq_type,
                                     AMDGPU_RING_TYPE_COMPUTE);

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
index 904f0be06a4ff5354f317983e6fdcbf701f463e2..16e45fd323f9e796a047dedab971a9dcf3c790c6 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
@@ -1570,7 +1570,7 @@ static int gfx_v8_0_sw_init(void *handle)
                        ring->doorbell_index = AMDGPU_DOORBELL_GFX_RING0;
                }
 
-               r = amdgpu_ring_init(adev, ring, 128 * 1024,
+               r = amdgpu_ring_init(adev, ring, 1024,
                                     PACKET3(PACKET3_NOP, 0x3FFF), 0xf,
                                     &adev->gfx.eop_irq, AMDGPU_CP_IRQ_GFX_EOP,
                                     AMDGPU_RING_TYPE_GFX);
@@ -1597,7 +1597,7 @@ static int gfx_v8_0_sw_init(void *handle)
                sprintf(ring->name, "comp %d.%d.%d", ring->me, ring->pipe, ring->queue);
                irq_type = AMDGPU_CP_IRQ_COMPUTE_MEC1_PIPE0_EOP + ring->pipe;
                /* type-2 packets are deprecated on MEC, use type-3 instead */
-               r = amdgpu_ring_init(adev, ring, 128 * 1024,
+               r = amdgpu_ring_init(adev, ring, 1024,
                                     PACKET3(PACKET3_NOP, 0x3FFF), 0xf,
                                     &adev->gfx.eop_irq, irq_type,
                                     AMDGPU_RING_TYPE_COMPUTE);