tty: serial: xuartps: Wait for rx and tx reset done status

After issuing the reset, driver is not checking the rx and tx reset
done status. So, modified driver to wait for the reset done status.

Signed-off-by: Nava kishore Manne <navam@xilinx.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

diff --git a/drivers/tty/serial/xilinx_uartps.c b/drivers/tty/serial/xilinx_uartps.c
index bf06d2c6b96ef900be5ea054216d06a5571b817f..e0c6a8619b9fd4f54a7c4d780e8357e8499c0d43 100644 (file)
--- a/drivers/tty/serial/xilinx_uartps.c
+++ b/drivers/tty/serial/xilinx_uartps.c
@@ -694,6 +694,10 @@ static void cdns_uart_set_termios(struct uart_port *port,
        ctrl_reg |= CDNS_UART_CR_TXRST | CDNS_UART_CR_RXRST;
        writel(ctrl_reg, port->membase + CDNS_UART_CR);
 
+       while (readl(port->membase + CDNS_UART_CR) &
+               (CDNS_UART_CR_TXRST | CDNS_UART_CR_RXRST))
+               cpu_relax();
+
        /*
         * Clear the RX disable and TX disable bits and then set the TX enable
         * bit and RX enable bit to enable the transmitter and receiver.
@@ -797,6 +801,10 @@ static int cdns_uart_startup(struct uart_port *port)
        writel(CDNS_UART_CR_TXRST | CDNS_UART_CR_RXRST,
                        port->membase + CDNS_UART_CR);
 
+       while (readl(port->membase + CDNS_UART_CR) &
+               (CDNS_UART_CR_TXRST | CDNS_UART_CR_RXRST))
+               cpu_relax();
+
        /*
         * Clear the RX disable bit and then set the RX enable bit to enable
         * the receiver.