drm/nouveau/gsp: add hal for fifo.chan.alloc

570.86.16 has incompatible changes to NV_CHANNEL_ALLOC_PARAMS.

At the same time, remove the duplicated channel allocation code from
golden context init.

Signed-off-by: Ben Skeggs <bskeggs@nvidia.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Timur Tabi <ttabi@nvidia.com>
Tested-by: Timur Tabi <ttabi@nvidia.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/fifo.c b/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/fifo.c
index 58a47c62690af6bc472d4d80882998af386a1152..64570617991316ac620ace70c7f00f531a04a770 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/fifo.c
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/fifo.c
@@ -70,50 +70,29 @@ r535_chan_ramfc_clear(struct nvkm_chan *chan)
 #define CHID_PER_USERD 8
 
 static int
-r535_chan_ramfc_write(struct nvkm_chan *chan, u64 offset, u64 length, u32 devm, bool priv)
+r535_chan_alloc(struct nvkm_gsp_device *device, u32 handle, u32 nv2080_engine_type, u8 runq,
+               bool priv, int chid, u64 inst_addr, u64 userd_addr, u64 mthdbuf_addr,
+               struct nvkm_vmm *vmm, u64 gpfifo_offset, u32 gpfifo_length,
+               struct nvkm_gsp_object *chan)
 {
-       struct nvkm_fifo *fifo = chan->cgrp->runl->fifo;
-       struct nvkm_engn *engn;
-       struct nvkm_device *device = fifo->engine.subdev.device;
+       struct nvkm_gsp *gsp = device->object.client->gsp;
+       struct nvkm_fifo *fifo = gsp->subdev.device->fifo;
+       const int userd_p = chid / CHID_PER_USERD;
+       const int userd_i = chid % CHID_PER_USERD;
        NV_CHANNELGPFIFO_ALLOCATION_PARAMETERS *args;
-       const int userd_p = chan->id / CHID_PER_USERD;
-       const int userd_i = chan->id % CHID_PER_USERD;
-       u32 eT = ~0;
-       int ret;
 
-       if (unlikely(device->gr && !device->gr->engine.subdev.oneinit)) {
-               ret = nvkm_subdev_oneinit(&device->gr->engine.subdev);
-               if (ret)
-                       return ret;
-       }
-
-       nvkm_runl_foreach_engn(engn, chan->cgrp->runl) {
-               eT = engn->id;
-               break;
-       }
-
-       if (WARN_ON(eT == ~0))
-               return -EINVAL;
-
-       chan->rm.mthdbuf.ptr = dma_alloc_coherent(fifo->engine.subdev.device->dev,
-                                                 fifo->rm.mthdbuf_size,
-                                                 &chan->rm.mthdbuf.addr, GFP_KERNEL);
-       if (!chan->rm.mthdbuf.ptr)
-               return -ENOMEM;
-
-       args = nvkm_gsp_rm_alloc_get(&chan->vmm->rm.device.object, NVKM_RM_CHAN(chan->id),
-                                    fifo->func->chan.user.oclass, sizeof(*args),
-                                    &chan->rm.object);
+       args = nvkm_gsp_rm_alloc_get(&device->object, handle,
+                                    fifo->func->chan.user.oclass, sizeof(*args), chan);
        if (WARN_ON(IS_ERR(args)))
                return PTR_ERR(args);
 
-       args->gpFifoOffset = offset;
-       args->gpFifoEntries = length / 8;
+       args->gpFifoOffset = gpfifo_offset;
+       args->gpFifoEntries = gpfifo_length / 8;
 
        args->flags  = NVDEF(NVOS04, FLAGS, CHANNEL_TYPE, PHYSICAL);
        args->flags |= NVDEF(NVOS04, FLAGS, VPR, FALSE);
        args->flags |= NVDEF(NVOS04, FLAGS, CHANNEL_SKIP_MAP_REFCOUNTING, FALSE);
-       args->flags |= NVVAL(NVOS04, FLAGS, GROUP_CHANNEL_RUNQUEUE, chan->runq);
+       args->flags |= NVVAL(NVOS04, FLAGS, GROUP_CHANNEL_RUNQUEUE, runq);
        if (!priv)
                args->flags |= NVDEF(NVOS04, FLAGS, PRIVILEGED_CHANNEL, FALSE);
        else
@@ -136,25 +115,25 @@ r535_chan_ramfc_write(struct nvkm_chan *chan, u64 offset, u64 length, u32 devm,
        args->flags |= NVDEF(NVOS04, FLAGS, MAP_CHANNEL, FALSE);
        args->flags |= NVDEF(NVOS04, FLAGS, SKIP_CTXBUFFER_ALLOC, FALSE);
 
-       args->hVASpace = chan->vmm->rm.object.handle;
-       args->engineType = eT;
+       args->hVASpace = vmm->rm.object.handle;
+       args->engineType = nv2080_engine_type;
 
-       args->instanceMem.base = chan->inst->addr;
-       args->instanceMem.size = chan->inst->size;
+       args->instanceMem.base = inst_addr;
+       args->instanceMem.size = fifo->func->chan.func->inst->size;
        args->instanceMem.addressSpace = 2;
        args->instanceMem.cacheAttrib = 1;
 
-       args->userdMem.base = nvkm_memory_addr(chan->userd.mem) + chan->userd.base;
+       args->userdMem.base = userd_addr;
        args->userdMem.size = fifo->func->chan.func->userd->size;
        args->userdMem.addressSpace = 2;
        args->userdMem.cacheAttrib = 1;
 
-       args->ramfcMem.base = chan->inst->addr + 0;
+       args->ramfcMem.base = inst_addr;
        args->ramfcMem.size = 0x200;
        args->ramfcMem.addressSpace = 2;
        args->ramfcMem.cacheAttrib = 1;
 
-       args->mthdbufMem.base = chan->rm.mthdbuf.addr;
+       args->mthdbufMem.base = mthdbuf_addr;
        args->mthdbufMem.size = fifo->rm.mthdbuf_size;
        args->mthdbufMem.addressSpace = 1;
        args->mthdbufMem.cacheAttrib = 0;
@@ -166,7 +145,44 @@ r535_chan_ramfc_write(struct nvkm_chan *chan, u64 offset, u64 length, u32 devm,
        args->internalFlags |= NVDEF(NV_KERNELCHANNEL, ALLOC_INTERNALFLAGS, ERROR_NOTIFIER_TYPE, NONE);
        args->internalFlags |= NVDEF(NV_KERNELCHANNEL, ALLOC_INTERNALFLAGS, ECC_ERROR_NOTIFIER_TYPE, NONE);
 
-       ret = nvkm_gsp_rm_alloc_wr(&chan->rm.object, args);
+       return nvkm_gsp_rm_alloc_wr(chan, args);
+}
+
+static int
+r535_chan_ramfc_write(struct nvkm_chan *chan, u64 offset, u64 length, u32 devm, bool priv)
+{
+       struct nvkm_fifo *fifo = chan->cgrp->runl->fifo;
+       struct nvkm_engn *engn;
+       struct nvkm_device *device = fifo->engine.subdev.device;
+       const struct nvkm_rm_api *rmapi = device->gsp->rm->api;
+       u32 eT = ~0;
+       int ret;
+
+       if (unlikely(device->gr && !device->gr->engine.subdev.oneinit)) {
+               ret = nvkm_subdev_oneinit(&device->gr->engine.subdev);
+               if (ret)
+                       return ret;
+       }
+
+       nvkm_runl_foreach_engn(engn, chan->cgrp->runl) {
+               eT = engn->id;
+               break;
+       }
+
+       if (WARN_ON(eT == ~0))
+               return -EINVAL;
+
+       chan->rm.mthdbuf.ptr = dma_alloc_coherent(fifo->engine.subdev.device->dev,
+                                                 fifo->rm.mthdbuf_size,
+                                                 &chan->rm.mthdbuf.addr, GFP_KERNEL);
+       if (!chan->rm.mthdbuf.ptr)
+               return -ENOMEM;
+
+       ret = rmapi->fifo->chan.alloc(&chan->vmm->rm.device, NVKM_RM_CHAN(chan->id),
+                                     eT, chan->runq, priv, chan->id, chan->inst->addr,
+                                     nvkm_memory_addr(chan->userd.mem) + chan->userd.base,
+                                     chan->rm.mthdbuf.addr, chan->vmm, offset, length,
+                                     &chan->rm.object);
        if (ret)
                return ret;
 
@@ -541,4 +557,7 @@ const struct nvkm_rm_api_fifo
 r535_fifo = {
        .xlat_rm_engine_type = r535_fifo_xlat_rm_engine_type,
        .ectx_size = r535_fifo_ectx_size,
+       .chan = {
+               .alloc = r535_chan_alloc,
+       },
 };

diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/gr.c b/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/gr.c
index e0fa88aa608f39538a37164f58b47b4a7cd49f01..cc28de66cfa3a05c3aad03bdad884fbf75f5534d 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/gr.c
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/gr.c
@@ -298,74 +298,20 @@ r535_gr_oneinit(struct nvkm_gr *base)
        if (ret)
                goto done;
 
-       {
-               NV_CHANNELGPFIFO_ALLOCATION_PARAMETERS *args;
-
-               args = nvkm_gsp_rm_alloc_get(&golden.vmm->rm.device.object, NVKM_RM_CHAN(0),
-                                            device->fifo->func->chan.user.oclass,
-                                            sizeof(*args), &golden.chan);
-               if (IS_ERR(args)) {
-                       ret = PTR_ERR(args);
-                       goto done;
-               }
-
-               args->gpFifoOffset = 0;
-               args->gpFifoEntries = 0x1000 / 8;
-               args->flags =
-                       NVDEF(NVOS04, FLAGS, CHANNEL_TYPE, PHYSICAL) |
-                       NVDEF(NVOS04, FLAGS, VPR, FALSE) |
-                       NVDEF(NVOS04, FLAGS, CHANNEL_SKIP_MAP_REFCOUNTING, FALSE) |
-                       NVVAL(NVOS04, FLAGS, GROUP_CHANNEL_RUNQUEUE, 0) |
-                       NVDEF(NVOS04, FLAGS, PRIVILEGED_CHANNEL, TRUE) |
-                       NVDEF(NVOS04, FLAGS, DELAY_CHANNEL_SCHEDULING, FALSE) |
-                       NVDEF(NVOS04, FLAGS, CHANNEL_DENY_PHYSICAL_MODE_CE, FALSE) |
-                       NVVAL(NVOS04, FLAGS, CHANNEL_USERD_INDEX_VALUE, 0) |
-                       NVDEF(NVOS04, FLAGS, CHANNEL_USERD_INDEX_FIXED, FALSE) |
-                       NVVAL(NVOS04, FLAGS, CHANNEL_USERD_INDEX_PAGE_VALUE, 0) |
-                       NVDEF(NVOS04, FLAGS, CHANNEL_USERD_INDEX_PAGE_FIXED, TRUE) |
-                       NVDEF(NVOS04, FLAGS, CHANNEL_DENY_AUTH_LEVEL_PRIV, FALSE) |
-                       NVDEF(NVOS04, FLAGS, CHANNEL_SKIP_SCRUBBER, FALSE) |
-                       NVDEF(NVOS04, FLAGS, CHANNEL_CLIENT_MAP_FIFO, FALSE) |
-                       NVDEF(NVOS04, FLAGS, SET_EVICT_LAST_CE_PREFETCH_CHANNEL, FALSE) |
-                       NVDEF(NVOS04, FLAGS, CHANNEL_VGPU_PLUGIN_CONTEXT, FALSE) |
-                       NVDEF(NVOS04, FLAGS, CHANNEL_PBDMA_ACQUIRE_TIMEOUT, FALSE) |
-                       NVDEF(NVOS04, FLAGS, GROUP_CHANNEL_THREAD, DEFAULT) |
-                       NVDEF(NVOS04, FLAGS, MAP_CHANNEL, FALSE) |
-                       NVDEF(NVOS04, FLAGS, SKIP_CTXBUFFER_ALLOC, FALSE);
-               args->hVASpace = golden.vmm->rm.object.handle;
-               args->engineType = 1;
-               args->instanceMem.base = nvkm_memory_addr(golden.inst);
-               args->instanceMem.size = 0x1000;
-               args->instanceMem.addressSpace = 2;
-               args->instanceMem.cacheAttrib = 1;
-               args->ramfcMem.base = nvkm_memory_addr(golden.inst);
-               args->ramfcMem.size = 0x200;
-               args->ramfcMem.addressSpace = 2;
-               args->ramfcMem.cacheAttrib = 1;
-               args->userdMem.base = nvkm_memory_addr(golden.inst) + 0x1000;
-               args->userdMem.size = 0x200;
-               args->userdMem.addressSpace = 2;
-               args->userdMem.cacheAttrib = 1;
-               args->mthdbufMem.base = nvkm_memory_addr(golden.inst) + 0x2000;
-               args->mthdbufMem.size = 0x5000;
-               args->mthdbufMem.addressSpace = 2;
-               args->mthdbufMem.cacheAttrib = 1;
-               args->internalFlags =
-                       NVDEF(NV_KERNELCHANNEL, ALLOC_INTERNALFLAGS, PRIVILEGE, ADMIN) |
-                       NVDEF(NV_KERNELCHANNEL, ALLOC_INTERNALFLAGS, ERROR_NOTIFIER_TYPE, NONE) |
-                       NVDEF(NV_KERNELCHANNEL, ALLOC_INTERNALFLAGS, ECC_ERROR_NOTIFIER_TYPE, NONE);
-
-               ret = nvkm_gsp_rm_alloc_wr(&golden.chan, args);
-               if (ret)
-                       goto done;
-       }
+       ret = rm->api->fifo->chan.alloc(&golden.vmm->rm.device, NVKM_RM_CHAN(0), 1, 0, true, 0,
+                                       nvkm_memory_addr(golden.inst),
+                                       nvkm_memory_addr(golden.inst) + 0x1000,
+                                       nvkm_memory_addr(golden.inst) + 0x2000,
+                                       golden.vmm, 0, 0x1000, &golden.chan);
+       if (ret)
+               goto done;
 
        /* Fetch context buffer info from RM and allocate each of them here to use
         * during golden context init (or later as a global context buffer).
         *
         * Also build the information that'll be used to create channel contexts.
         */
-       ret = gsp->rm->api->gr->get_ctxbufs_info(gr);
+       ret = rm->api->gr->get_ctxbufs_info(gr);
        if (ret)
                goto done;
 

diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/rm.h b/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/rm.h
index 01cb97f1e494b3eecac9a0be551f879a6e0442ad..29663dbe99e12ab6fafa22346f639c774c7284bf 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/rm.h
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/rm.h
@@ -101,6 +101,13 @@ struct nvkm_rm_api {
                int (*xlat_rm_engine_type)(u32 rm_engine_type,
                                           enum nvkm_subdev_type *, int *nv2080_type);
                int (*ectx_size)(struct nvkm_fifo *);
+               struct {
+                       int (*alloc)(struct nvkm_gsp_device *, u32 handle,
+                                    u32 nv2080_engine_type, u8 runq, bool priv, int chid,
+                                    u64 inst_addr, u64 userd_addr, u64 mthdbuf_addr,
+                                    struct nvkm_vmm *, u64 gpfifo_offset, u32 gpfifo_length,
+                                    struct nvkm_gsp_object *);
+               } chan;
        } *fifo;
 
        const struct nvkm_rm_api_engine {