drm/i915/display/dmc: Set DC_STATE_DEBUG_MASK_CORES after firmware load

Specification asks for DC_STATE_DEBUG_MASK_CORES to be set for all
platforms that supports DMC, not only for geminilake and broxton.

While at is also taking the oportunity to simply the code.

BSpec: 7402
BSpec: 49436
Reviewed-by: Imre Deak <imre.deak@intel.com>
Cc: Imre Deak <imre.deak@intel.com>
Cc: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210922215242.66683-1-jose.souza@intel.com

diff --git a/drivers/gpu/drm/i915/display/intel_dmc.c b/drivers/gpu/drm/i915/display/intel_dmc.c
index b0268552b28637c187b6464c19b06fe95f5e786a..2dc9d632969dbca821d4ec7d2f2d5f91aa6df422 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_dmc.c
+++ b/drivers/gpu/drm/i915/display/intel_dmc.c
@@ -255,20 +255,10 @@ intel_get_stepping_info(struct drm_i915_private *i915,
 
 static void gen9_set_dc_state_debugmask(struct drm_i915_private *dev_priv)
 {
-       u32 val, mask;
-
-       mask = DC_STATE_DEBUG_MASK_MEMORY_UP;
-
-       if (IS_GEMINILAKE(dev_priv) || IS_BROXTON(dev_priv))
-               mask |= DC_STATE_DEBUG_MASK_CORES;
-
        /* The below bit doesn't need to be cleared ever afterwards */
-       val = intel_de_read(dev_priv, DC_STATE_DEBUG);
-       if ((val & mask) != mask) {
-               val |= mask;
-               intel_de_write(dev_priv, DC_STATE_DEBUG, val);
-               intel_de_posting_read(dev_priv, DC_STATE_DEBUG);
-       }
+       intel_de_rmw(dev_priv, DC_STATE_DEBUG, 0,
+                    DC_STATE_DEBUG_MASK_CORES | DC_STATE_DEBUG_MASK_MEMORY_UP);
+       intel_de_posting_read(dev_priv, DC_STATE_DEBUG);
 }
 
 /**