.owner = THIS_MODULE,
 };
 
+static void tegra_pinctrl_clear_parked_bits(struct tegra_pmx *pmx)
+{
+       int i = 0;
+       const struct tegra_pingroup *g;
+       u32 val;
+
+       for (i = 0; i < pmx->soc->ngroups; ++i) {
+               if (pmx->soc->groups[i].parked_reg >= 0) {
+                       g = &pmx->soc->groups[i];
+                       val = pmx_readl(pmx, g->parked_bank, g->parked_reg);
+                       val &= ~(1 << g->parked_bit);
+                       pmx_writel(pmx, val, g->parked_bank, g->parked_reg);
+               }
+       }
+}
+
 static bool gpio_node_has_range(void)
 {
        struct device_node *np;
                return PTR_ERR(pmx->pctl);
        }
 
+       tegra_pinctrl_clear_parked_bits(pmx);
+
        if (!gpio_node_has_range())
                pinctrl_add_gpio_range(pmx->pctl, &tegra_pinctrl_gpio_range);
 
 
  * @tri_reg:           Tri-state register offset.
  * @tri_bank:          Tri-state register bank.
  * @tri_bit:           Tri-state register bit.
+ * @parked_reg:                Parked register offset. -1 if unsupported.
+ * @parked_bank:       Parked register bank. 0 if unsupported.
+ * @parked_bit:                Parked register bit. 0 if unsupported.
  * @einput_bit:                Enable-input register bit.
  * @odrain_bit:                Open-drain register bit.
  * @lock_bit:          Lock register bit.
        s16 pupd_reg;
        s16 tri_reg;
        s16 drv_reg;
+       s16 parked_reg;
        u32 mux_bank:2;
        u32 pupd_bank:2;
        u32 tri_bank:2;
        u32 drv_bank:2;
+       u32 parked_bank:2;
        s32 mux_bit:6;
        s32 pupd_bit:6;
        s32 tri_bit:6;
+       s32 parked_bit:6;
        s32 einput_bit:6;
        s32 odrain_bit:6;
        s32 lock_bit:6;
 
                .lock_bit = 7,                                          \
                .ioreset_bit = PINGROUP_BIT_##ior(8),                   \
                .rcv_sel_bit = PINGROUP_BIT_##rcv_sel(9),               \
+               .parked_reg = -1,                                       \
                .drv_reg = -1,                                          \
        }
 
                .rcv_sel_bit = -1,                                      \
                .drv_reg = DRV_PINGROUP_REG(r),                         \
                .drv_bank = 0,                                          \
+               .parked_reg = -1,                                       \
                .hsm_bit = hsm_b,                                       \
                .schmitt_bit = schmitt_b,                               \
                .lpmd_bit = lpmd_b,                                     \
 
                .lock_bit = 7,                                          \
                .ioreset_bit = PINGROUP_BIT_##ior(8),                   \
                .rcv_sel_bit = PINGROUP_BIT_##rcv_sel(9),               \
+               .parked_reg = -1,                                       \
                .drv_reg = -1,                                          \
        }
 
                .rcv_sel_bit = -1,                                      \
                .drv_reg = DRV_PINGROUP_REG(r),                         \
                .drv_bank = 0,                                          \
+               .parked_reg = -1,                                       \
                .hsm_bit = hsm_b,                                       \
                .schmitt_bit = schmitt_b,                               \
                .lpmd_bit = lpmd_b,                                     \
 
                .tri_reg = ((tri_r) - TRISTATE_REG_A),          \
                .tri_bank = 0,                                  \
                .tri_bit = tri_b,                               \
+               .parked_reg = -1,                               \
                .einput_bit = -1,                               \
                .odrain_bit = -1,                               \
                .lock_bit = -1,                                 \
                .pupd_bank = 2,                                 \
                .pupd_bit = pupd_b,                             \
                .drv_reg = -1,                                  \
+               .parked_reg = -1,                               \
        }
 
 /* Pin groups for drive strength registers (configurable version) */
                .tri_reg = -1,                                  \
                .drv_reg = ((r) - PINGROUP_REG_A),              \
                .drv_bank = 3,                                  \
+               .parked_reg = -1,                               \
                .hsm_bit = hsm_b,                               \
                .schmitt_bit = schmitt_b,                       \
                .lpmd_bit = lpmd_b,                             \
 
                .lock_bit = 7,                                          \
                .ioreset_bit = -1,                                      \
                .rcv_sel_bit = PINGROUP_BIT_##e_io_hv(10),              \
+               .parked_reg = PINGROUP_REG(r),                          \
+               .parked_bank = 1,                                       \
+               .parked_bit = 5,                                        \
                .hsm_bit = PINGROUP_BIT_##hsm(9),                       \
                .schmitt_bit = 12,                                      \
                .drvtype_bit = PINGROUP_BIT_##drvtype(13),              \
                .rcv_sel_bit = -1,                                      \
                .drv_reg = DRV_PINGROUP_REG(r),                         \
                .drv_bank = 0,                                          \
+               .parked_reg = -1,                                       \
                .hsm_bit = -1,                                          \
                .schmitt_bit = -1,                                      \
                .lpmd_bit = -1,                                         \
 
                .lock_bit = 7,                                          \
                .ioreset_bit = PINGROUP_BIT_##ior(8),                   \
                .rcv_sel_bit = -1,                                      \
+               .parked_reg = -1,                                       \
                .drv_reg = -1,                                          \
        }
 
                .rcv_sel_bit = -1,                                      \
                .drv_reg = DRV_PINGROUP_REG(r),                         \
                .drv_bank = 0,                                          \
+               .parked_reg = -1,                                       \
                .hsm_bit = hsm_b,                                       \
                .schmitt_bit = schmitt_b,                               \
                .lpmd_bit = lpmd_b,                                     \