#include "../comedidev.h"
 
 #include "8255.h"
+#include "mite.h"
 
 enum pci_8255_boardid {
        BOARD_ADLINK_PCI7224,
        const char *name;
        int dio_badr;
        int n_8255;
+       unsigned int has_mite:1;
 };
 
 static const struct pci_8255_boardinfo pci_8255_boards[] = {
                .name           = "ni_pci-dio-96",
                .dio_badr       = 1,
                .n_8255         = 4,
+               .has_mite       = 1,
        },
        [BOARD_NI_PCIDIO96B] = {
                .name           = "ni_pci-dio-96b",
                .dio_badr       = 1,
                .n_8255         = 4,
+               .has_mite       = 1,
        },
        [BOARD_NI_PXI6508] = {
                .name           = "ni_pxi-6508",
                .dio_badr       = 1,
                .n_8255         = 4,
+               .has_mite       = 1,
        },
        [BOARD_NI_PCI6503] = {
                .name           = "ni_pci-6503",
                .dio_badr       = 1,
                .n_8255         = 1,
+               .has_mite       = 1,
        },
        [BOARD_NI_PCI6503B] = {
                .name           = "ni_pci-6503b",
                .dio_badr       = 1,
                .n_8255         = 1,
+               .has_mite       = 1,
        },
        [BOARD_NI_PCI6503X] = {
                .name           = "ni_pci-6503x",
                .dio_badr       = 1,
                .n_8255         = 1,
+               .has_mite       = 1,
        },
        [BOARD_NI_PXI_6503] = {
                .name           = "ni_pxi-6503",
                .dio_badr       = 1,
                .n_8255         = 1,
+               .has_mite       = 1,
        },
 };
 
        void __iomem *mmio_base;
 };
 
+static int pci_8255_mite_init(struct pci_dev *pcidev)
+{
+       void __iomem *mite_base;
+       u32 main_phys_addr;
+
+       /* ioremap the MITE registers (BAR 0) temporarily */
+       mite_base = pci_ioremap_bar(pcidev, 0);
+       if (!mite_base)
+               return -ENOMEM;
+
+       /* set data window to main registers (BAR 1) */
+       main_phys_addr = pci_resource_start(pcidev, 1);
+       writel(main_phys_addr | WENAB, mite_base + MITE_IODWBSR);
+
+       /* finished with MITE registers */
+       iounmap(mite_base);
+       return 0;
+}
+
 static int pci_8255_mmio(int dir, int port, int data, unsigned long iobase)
 {
        void __iomem *mmio_base = (void __iomem *)iobase;
        if (ret)
                return ret;
 
+       if (board->has_mite) {
+               ret = pci_8255_mite_init(pcidev);
+               if (ret)
+                       return ret;
+       }
+
        is_mmio = (pci_resource_flags(pcidev, board->dio_badr) &
                   IORESOURCE_MEM) != 0;
        if (is_mmio) {