nv_wr32(dev, 0x400824, nv_rd32(dev, 0x400824) & ~(1 << 31));
 }
 
-static void
-nouveau_crtc_irq_handler(struct drm_device *dev, int crtc)
-{
-       if (crtc & 1) {
-               nv_wr32(dev, NV_CRTC0_INTSTAT, NV_CRTC_INTR_VBLANK);
-               drm_handle_vblank(dev, 0);
-       }
-
-       if (crtc & 2) {
-               nv_wr32(dev, NV_CRTC1_INTSTAT, NV_CRTC_INTR_VBLANK);
-               drm_handle_vblank(dev, 1);
-       }
-}
-
 irqreturn_t
 nouveau_irq_handler(DRM_IRQ_ARGS)
 {
                status &= ~NV_PMC_INTR_0_PGRAPH_PENDING;
        }
 
-       if (status & NV_PMC_INTR_0_CRTCn_PENDING) {
-               nouveau_crtc_irq_handler(dev, (status>>24)&3);
-               status &= ~NV_PMC_INTR_0_CRTCn_PENDING;
-       }
-
        for (i = 0; i < 32 && status; i++) {
                if (!(status & (1 << i)) || !dev_priv->irq_handler[i])
                        continue;
 
 #include "nouveau_encoder.h"
 #include "nouveau_connector.h"
 
+static void nv04_vblank_crtc0_isr(struct drm_device *);
+static void nv04_vblank_crtc1_isr(struct drm_device *);
+
 static void
 nv04_display_store_initial_head_owner(struct drm_device *dev)
 {
                func->save(encoder);
        }
 
+       nouveau_irq_register(dev, 24, nv04_vblank_crtc0_isr);
+       nouveau_irq_register(dev, 25, nv04_vblank_crtc1_isr);
        return 0;
 }
 
        return 0;
 }
 
+static void
+nv04_vblank_crtc0_isr(struct drm_device *dev)
+{
+       nv_wr32(dev, NV_CRTC0_INTSTAT, NV_CRTC_INTR_VBLANK);
+       drm_handle_vblank(dev, 0);
+}
+
+static void
+nv04_vblank_crtc1_isr(struct drm_device *dev)
+{
+       nv_wr32(dev, NV_CRTC1_INTSTAT, NV_CRTC_INTR_VBLANK);
+       drm_handle_vblank(dev, 1);
+}