+2019-11-20 Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
+ - Version 0.6.5
+
+ * Several fixes for error handling logic
+ * Alter tables on SQL in case of errors during update
+ * store PCIe dev name and TLP header for the aer event
+
2019-10-10 Mauro Carvalho Chehab <mchehab+samsung@kernel.org>
- Version 0.6.4
this:
./configure CC="gcc -arch i386 -arch x86_64 -arch ppc -arch ppc64" \
- CXX="g++ -arch i386 -arch x86_64 -arch ppc -arch ppc64" \
- CPP="gcc -E" CXXCPP="g++ -E"
+ CXX="g++ -arch i386 -arch x86_64 -arch ppc -arch ppc64" \
+ CPP="gcc -E" CXXCPP="g++ -E"
This is not guaranteed to produce working output in all cases, you
may have to build one architecture at a time and combine the results
-AC_INIT([RASdaemon], 0.6.4)
+AC_INIT([RASdaemon], 0.6.5)
AM_SILENT_RULES([yes])
AC_CANONICAL_SYSTEM
AC_CONFIG_MACRO_DIR([m4])
%changelog
+* Wed Nov 20 2019 Mauro Carvalho Chehab <mchehab+huawei@kernel.org> 0.6.5-1
+- Bump to version 0.6.5 with several fixes and improves PCIe events record
+
* Fri Oct 10 2019 Mauro Carvalho Chehab <mchehab+samsung@kernel.org> 0.6.4-1
-- Bump to version 0.6.3 with some DB changes for hip08 and some fixes
+- Bump to version 0.6.4 with some DB changes for hip08 and some fixes
* Fri Aug 23 2019 Mauro Carvalho Chehab <mchehab+samsung@kernel.org> 0.6.3-1
- Bump to version 0.6.3 with new ARM events, plus disk I/O and netlink support