@end deffn
@deffn {Flash Driver} {stm32l4x}
-All members of the STM32 G0, G4, L4, L4+, L5, U0, U5, WB and WL
+All members of the STM32 C0, G0, G4, L4, L4+, L5, U0, U5, WB and WL
microcontroller families from STMicroelectronics include internal flash
and use ARM Cortex-M0+, M4 and M33 cores.
The driver automatically recognizes a number of these chips using
{ 0x1000, "A" }, { 0x1001, "Z" },
};
+static const struct stm32l4_rev stm32c071xx_revs[] = {
+ { 0x1001, "Z" },
+};
+
static const struct stm32l4_rev stm32g05_g06xx_revs[] = {
{ 0x1000, "A" },
};
.otp_base = 0x1FFF7000,
.otp_size = 1024,
},
+ {
+ .id = DEVID_STM32C071XX,
+ .revs = stm32c071xx_revs,
+ .num_revs = ARRAY_SIZE(stm32c071xx_revs),
+ .device_str = "STM32C071xx",
+ .max_flash_size_kb = 128,
+ .flags = F_NONE,
+ .flash_regs_base = 0x40022000,
+ .fsize_addr = 0x1FFF75A0,
+ .otp_base = 0x1FFF7000,
+ .otp_size = 1024,
+ },
{
.id = DEVID_STM32U53_U54XX,
.revs = stm32u53_u54xx_revs,
case DEVID_STM32L43_L44XX:
case DEVID_STM32C01XX:
case DEVID_STM32C03XX:
+ case DEVID_STM32C071XX:
case DEVID_STM32G05_G06XX:
case DEVID_STM32G07_G08XX:
case DEVID_STM32U031XX:
#define DEVID_STM32U57_U58XX 0x482
#define DEVID_STM32U073_U083XX 0x489
#define DEVID_STM32WBA5X 0x492
+#define DEVID_STM32C071XX 0x493
#define DEVID_STM32WB1XX 0x494
#define DEVID_STM32WB5XX 0x495
#define DEVID_STM32WB3XX 0x496
--- /dev/null
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+source [find interface/stlink.cfg]
+
+transport select dapdirect_swd
+
+source [find target/stm32c0x.cfg]
+
+reset_config srst_only