i -= rx_ring->count;
                }
 
-               /* clear the hdr_addr for the next_to_use descriptor */
-               rx_desc->read.hdr_addr = 0;
+               /* clear the length for the next_to_use descriptor */
+               rx_desc->wb.upper.length = 0;
 
                cleaned_count--;
        } while (cleaned_count);
 
                rx_desc = IXGBEVF_RX_DESC(rx_ring, rx_ring->next_to_clean);
 
-               if (!ixgbevf_test_staterr(rx_desc, IXGBE_RXD_STAT_DD))
+               if (!rx_desc->wb.upper.length)
                        break;
 
                /* This memory barrier is needed to keep us from reading
                                      struct ixgbevf_ring *ring)
 {
        struct ixgbe_hw *hw = &adapter->hw;
+       union ixgbe_adv_rx_desc *rx_desc;
        u64 rdba = ring->dma;
        u32 rxdctl;
        u8 reg_idx = ring->reg_idx;
        IXGBE_WRITE_REG(hw, IXGBE_VFRDT(reg_idx), 0);
        ring->tail = adapter->io_addr + IXGBE_VFRDT(reg_idx);
 
+       /* initialize Rx descriptor 0 */
+       rx_desc = IXGBEVF_RX_DESC(ring, 0);
+       rx_desc->wb.upper.length = 0;
+
        /* reset ntu and ntc to place SW in sync with hardwdare */
        ring->next_to_clean = 0;
        ring->next_to_use = 0;
 
        size = sizeof(struct ixgbevf_rx_buffer) * rx_ring->count;
        memset(rx_ring->rx_buffer_info, 0, size);
-
-       /* Zero out the descriptor ring */
-       memset(rx_ring->desc, 0, rx_ring->size);
 }
 
 /**