__entry->vcpu_id, __entry->timer_index)
 );
 
+TRACE_EVENT(kvm_apicv_update_request,
+           TP_PROTO(bool activate, unsigned long bit),
+           TP_ARGS(activate, bit),
+
+       TP_STRUCT__entry(
+               __field(bool, activate)
+               __field(unsigned long, bit)
+       ),
+
+       TP_fast_assign(
+               __entry->activate = activate;
+               __entry->bit = bit;
+       ),
+
+       TP_printk("%s bit=%lu",
+                 __entry->activate ? "activate" : "deactivate",
+                 __entry->bit)
+);
+
 /*
  * Tracepoint for AMD AVIC
  */
 
                        return;
        }
 
+       trace_kvm_apicv_update_request(activate, bit);
        kvm_make_all_cpus_request(kvm, KVM_REQ_APICV_UPDATE);
 }
 EXPORT_SYMBOL_GPL(kvm_request_apicv_update);
 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update);
 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access);
 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi);
+EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_apicv_update_request);