u8 id;
        u64 vram_size;
        u64 original_size;
-       u64 current_size;
        u64 usable_size;
        int resize_result, err;
 
                xe->mem.vram.mapping = 0;
                xe->mem.vram.size = 0;
                xe->mem.vram.io_start = 0;
+               xe->mem.vram.io_size = 0;
 
                for_each_gt(gt, xe, id) {
                        gt->mem.vram.mapping = 0;
                        gt->mem.vram.size = 0;
                        gt->mem.vram.io_start = 0;
+                       gt->mem.vram.io_size = 0;
                }
                return 0;
        }
                return err;
 
        resize_result = xe_resize_vram_bar(xe, vram_size);
-       current_size = pci_resource_len(pdev, GEN12_LMEM_BAR);
        xe->mem.vram.io_start = pci_resource_start(pdev, GEN12_LMEM_BAR);
-
-       xe->mem.vram.size = min(current_size, vram_size);
+       xe->mem.vram.io_size = min(usable_size,
+                                  pci_resource_len(pdev, GEN12_LMEM_BAR));
+       xe->mem.vram.size = xe->mem.vram.io_size;
 
        if (!xe->mem.vram.size)
                return -EIO;
        if (resize_result > 0)
                drm_info(&xe->drm, "Successfully resize VRAM from %lluMiB to %lluMiB\n",
                         (u64)original_size >> 20,
-                        (u64)current_size >> 20);
-       else if (xe->mem.vram.size < vram_size && !xe_force_vram_bar_size)
+                        (u64)xe->mem.vram.io_size >> 20);
+       else if (xe->mem.vram.io_size < usable_size && !xe_force_vram_bar_size)
                drm_info(&xe->drm, "Using a reduced BAR size of %lluMiB. Consider enabling 'Resizable BAR' support in your BIOS.\n",
                         (u64)xe->mem.vram.size >> 20);
        if (xe->mem.vram.size < vram_size)
                drm_warn(&xe->drm, "Restricting VRAM size to PCI resource size (0x%llx->0x%llx)\n",
                         vram_size, (u64)xe->mem.vram.size);
 
-       xe->mem.vram.mapping = ioremap_wc(xe->mem.vram.io_start, xe->mem.vram.size);
+       xe->mem.vram.mapping = ioremap_wc(xe->mem.vram.io_start, xe->mem.vram.io_size);
        xe->mem.vram.size = min_t(u64, xe->mem.vram.size, usable_size);
 
        drm_info(&xe->drm, "TOTAL VRAM: %pa, %pa\n", &xe->mem.vram.io_start, &xe->mem.vram.size);
        /* FIXME: Assuming equally partitioned VRAM, incorrect */
        if (xe->info.tile_count > 1) {
                u8 adj_tile_count = xe->info.tile_count;
-               resource_size_t size, io_start;
+               resource_size_t size, io_start, io_size;
 
                for_each_gt(gt, xe, id)
                        if (xe_gt_is_media_type(gt))
 
                size = xe->mem.vram.size / adj_tile_count;
                io_start = xe->mem.vram.io_start;
+               io_size = xe->mem.vram.io_size;
 
                for_each_gt(gt, xe, id) {
-                       if (id && !xe_gt_is_media_type(gt))
-                               io_start += size;
+                       if (id && !xe_gt_is_media_type(gt)) {
+                               io_size -= min(io_size, size);
+                               io_start += io_size;
+                       }
 
                        gt->mem.vram.size = size;
-                       gt->mem.vram.io_start = io_start;
-                       gt->mem.vram.mapping = xe->mem.vram.mapping +
-                               (io_start - xe->mem.vram.io_start);
+
+                       /*
+                        * XXX: multi-tile small-bar might be wild. Hopefully
+                        * full tile without any mappable vram is not something
+                        * we care about.
+                        */
+
+                       gt->mem.vram.io_size = min(size, io_size);
+                       if (io_size) {
+                               gt->mem.vram.io_start = io_start;
+                               gt->mem.vram.mapping = xe->mem.vram.mapping +
+                                       (io_start - xe->mem.vram.io_start);
+                       } else {
+                               drm_err(&xe->drm, "Tile without any CPU visible VRAM. Aborting.\n");
+                               return -ENODEV;
+                       }
 
                        drm_info(&xe->drm, "VRAM[%u, %u]: %pa, %pa\n",
                                 id, gt->info.vram_id, >->mem.vram.io_start,
        } else {
                gt->mem.vram.size = xe->mem.vram.size;
                gt->mem.vram.io_start = xe->mem.vram.io_start;
+               gt->mem.vram.io_size = xe->mem.vram.io_size;
                gt->mem.vram.mapping = xe->mem.vram.mapping;
 
                drm_info(&xe->drm, "VRAM: %pa\n", >->mem.vram.size);