}
 }
 
-static int altera_spi_setupxfer(struct spi_device *spi, struct spi_transfer *t)
-{
-       return 0;
-}
-
-static int altera_spi_setup(struct spi_device *spi)
-{
-       return 0;
-}
-
 static inline unsigned int hw_txbyte(struct altera_spi *hw, int count)
 {
        if (hw->tx) {
        master->bus_num = pdev->id;
        master->num_chipselect = 16;
        master->mode_bits = SPI_CS_HIGH;
-       master->setup = altera_spi_setup;
 
        hw = spi_master_get_devdata(master);
        platform_set_drvdata(pdev, hw);
        hw->bitbang.master = spi_master_get(master);
        if (!hw->bitbang.master)
                return err;
-       hw->bitbang.setup_transfer = altera_spi_setupxfer;
        hw->bitbang.chipselect = altera_spi_chipsel;
        hw->bitbang.txrx_bufs = altera_spi_txrx;
 
 
 {
        int status = 0;
 
-       if (spi->bits_per_word > 32)
-               return -EINVAL;
-
        if (!spi->controller_state) {
                status = ath79_spi_setup_cs(spi);
                if (status)
 
        pdata = pdev->dev.platform_data;
 
+       master->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 32);
        master->setup = ath79_spi_setup;
        master->cleanup = ath79_spi_cleanup;
        if (pdata) {
 
                return -EINVAL;
        }
 
-       if (bits < 8 || bits > 16) {
-               dev_dbg(&spi->dev,
-                               "setup: invalid bits_per_word %u (8 to 16)\n",
-                               bits);
-               return -EINVAL;
-       }
-
        /* see notes above re chipselect */
        if (!atmel_spi_is_v2(as)
                        && spi->chip_select == 0
 
        /* the spi->mode bits understood by this driver: */
        master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH;
-
+       master->bits_per_word_mask = SPI_BPW_RANGE_MASK(8, 16);
        master->dev.of_node = pdev->dev.of_node;
        master->bus_num = pdev->id;
        master->num_chipselect = master->dev.of_node ? 0 : 4;
 
                        hz = t->speed_hz;
        }
 
-       if (bpw < 4 || bpw > 24) {
-               dev_err(&spi->dev, "setupxfer: invalid bits_per_word=%d\n",
-                       bpw);
-               return -EINVAL;
-       }
        if (hz > spi->max_speed_hz || hz > hw->freq_max || hz < hw->freq_min) {
                dev_err(&spi->dev, "setupxfer: clock rate=%d out of range\n",
                        hz);
 {
        struct au1550_spi *hw = spi_master_get_devdata(spi->master);
 
-       if (spi->bits_per_word < 4 || spi->bits_per_word > 24) {
-               dev_err(&spi->dev, "setup: invalid bits_per_word=%d\n",
-                       spi->bits_per_word);
-               return -EINVAL;
-       }
-
        if (spi->max_speed_hz == 0)
                spi->max_speed_hz = hw->freq_max;
        if (spi->max_speed_hz > hw->freq_max
 
        /* the spi->mode bits understood by this driver: */
        master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH | SPI_LSB_FIRST;
+       master->bits_per_word_mask = SPI_BPW_RANGE_MASK(4, 24);
 
        hw = spi_master_get_devdata(master);
 
 
 /* the spi->mode bits understood by this driver: */
 #define MODEBITS (SPI_CPOL | SPI_CPHA)
 
-static int bcm63xx_spi_setup(struct spi_device *spi)
-{
-       if (spi->bits_per_word != 8) {
-               dev_err(&spi->dev, "%s, unsupported bits_per_word=%d\n",
-                       __func__, spi->bits_per_word);
-               return -EINVAL;
-       }
-
-       return 0;
-}
-
 static int bcm63xx_txrx_bufs(struct spi_device *spi, struct spi_transfer *first,
                                unsigned int num_transfers)
 {
         * full-duplex transfers.
         */
        list_for_each_entry(t, &m->transfers, transfer_list) {
-               if (t->bits_per_word != 8) {
-                       dev_err(&spi->dev, "%s, unsupported bits_per_word=%d\n",
-                               __func__, t->bits_per_word);
-                       status = -EINVAL;
-                       goto exit;
-               }
-
                if (!first)
                        first = t;
 
 
        master->bus_num = pdata->bus_num;
        master->num_chipselect = pdata->num_chipselect;
-       master->setup = bcm63xx_spi_setup;
        master->prepare_transfer_hardware = bcm63xx_spi_prepare_transfer;
        master->unprepare_transfer_hardware = bcm63xx_spi_unprepare_transfer;
        master->transfer_one_message = bcm63xx_spi_transfer_one;
        master->mode_bits = MODEBITS;
+       master->bits_per_word_mask = SPI_BPW_MASK(8);
        bs->msg_type_shift = pdata->msg_type_shift;
        bs->msg_ctl_width = pdata->msg_ctl_width;
        bs->tx_io = (u8 *)(bs->regs + bcm63xx_spireg(SPI_MSG_DATA));
 
 
        /* Bits per word setup */
        bits_per_word = transfer->bits_per_word;
-       if (bits_per_word % 16 == 0)
+       if (bits_per_word == 16)
                drv_data->ops = &bfin_sport_transfer_ops_u16;
        else
                drv_data->ops = &bfin_sport_transfer_ops_u8;
                }
        }
 
-       if (spi->bits_per_word % 8) {
-               dev_err(&spi->dev, "%d bits_per_word is not supported\n",
-                               spi->bits_per_word);
-               ret = -EINVAL;
-               goto error;
-       }
-
        /* translate common spi framework into our register
         * following configure contents are same for tx and rx.
         */
        drv_data->pin_req = platform_info->pin_req;
 
        master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_LSB_FIRST;
+       master->bits_per_word_mask = SPI_BPW_MASK(8) | SPI_BPW_MASK(16);
        master->bus_num = pdev->id;
        master->num_chipselect = platform_info->num_chipselect;
        master->cleanup = bfin_sport_spi_cleanup;
 
 
        /* Bits per word setup */
        bits_per_word = transfer->bits_per_word;
-       if (bits_per_word % 16 == 0) {
+       if (bits_per_word == 16) {
                drv_data->n_bytes = bits_per_word/8;
                drv_data->len = (transfer->len) >> 1;
                cr_width = BIT_CTL_WORDSIZE;
                drv_data->ops = &bfin_bfin_spi_transfer_ops_u16;
-       } else if (bits_per_word % 8 == 0) {
+       } else if (bits_per_word == 8) {
                drv_data->n_bytes = bits_per_word/8;
                drv_data->len = transfer->len;
                cr_width = 0;
                drv_data->ops = &bfin_bfin_spi_transfer_ops_u8;
-       } else {
-               dev_err(&drv_data->pdev->dev, "transfer: unsupported bits_per_word\n");
-               message->status = -EINVAL;
-               bfin_spi_giveback(drv_data);
-               return;
        }
        cr = bfin_read(&drv_data->regs->ctl) & ~(BIT_CTL_TIMOD | BIT_CTL_WORDSIZE);
        cr |= cr_width;
                        bfin_write(&drv_data->regs->tdbr, chip->idle_tx_val);
                else {
                        int loop;
-                       if (bits_per_word % 16 == 0) {
+                       if (bits_per_word == 16) {
                                u16 *buf = (u16 *)drv_data->tx;
                                for (loop = 0; loop < bits_per_word / 16;
                                                loop++) {
                                        bfin_write(&drv_data->regs->tdbr, *buf++);
                                }
-                       } else if (bits_per_word % 8 == 0) {
+                       } else if (bits_per_word == 8) {
                                u8 *buf = (u8 *)drv_data->tx;
                                for (loop = 0; loop < bits_per_word / 8; loop++)
                                        bfin_write(&drv_data->regs->tdbr, *buf++);
                chip->ctl_reg &= bfin_ctl_reg;
        }
 
-       if (spi->bits_per_word % 8) {
-               dev_err(&spi->dev, "%d bits_per_word is not supported\n",
-                               spi->bits_per_word);
-               goto error;
-       }
-
        /* translate common spi framework into our register */
        if (spi->mode & ~(SPI_CPOL | SPI_CPHA | SPI_LSB_FIRST)) {
                dev_err(&spi->dev, "unsupported spi modes detected\n");
 
        /* the spi->mode bits supported by this driver: */
        master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_LSB_FIRST;
-
+       master->bits_per_word_mask = SPI_BPW_MASK(8) | SPI_BPW_MASK(16);
        master->bus_num = pdev->id;
        master->num_chipselect = platform_info->num_chipselect;
        master->cleanup = bfin_spi_cleanup;
 
 {
        struct spi_clps711x_data *hw = spi_master_get_devdata(spi->master);
 
-       if (spi->bits_per_word != 8) {
-               dev_err(&spi->dev, "Unsupported master bus width %i\n",
-                       spi->bits_per_word);
-               return -EINVAL;
-       }
-
        /* We are expect that SPI-device is not selected */
        gpio_direction_output(hw->chipselect[spi->chip_select],
                              !(spi->mode & SPI_CS_HIGH));
 
        master->bus_num = pdev->id;
        master->mode_bits = SPI_CPHA | SPI_CS_HIGH;
+       master->bits_per_word_mask = SPI_BPW_MASK(8);
        master->num_chipselect = pdata->num_chipselect;
        master->setup = spi_clps711x_setup;
        master->transfer_one_message = spi_clps711x_transfer_one_message;
 
                bool cs_high = spi->mode & SPI_CS_HIGH;
                u16 qmr = MCFQSPI_QMR_MSTR;
 
-               if (t->bits_per_word)
-                       qmr |= t->bits_per_word << 10;
-               else
-                       qmr |= spi->bits_per_word << 10;
+               qmr |= t->bits_per_word << 10;
                if (spi->mode & SPI_CPHA)
                        qmr |= MCFQSPI_QMR_CPHA;
                if (spi->mode & SPI_CPOL)
 
 static int mcfqspi_setup(struct spi_device *spi)
 {
-       if ((spi->bits_per_word < 8) || (spi->bits_per_word > 16)) {
-               dev_dbg(&spi->dev, "%d bits per word is not supported\n",
-                       spi->bits_per_word);
-               return -EINVAL;
-       }
        if (spi->chip_select >= spi->master->num_chipselect) {
                dev_dbg(&spi->dev, "%d chip select is out of range\n",
                        spi->chip_select);
        mcfqspi->dev = &pdev->dev;
 
        master->mode_bits = SPI_CS_HIGH | SPI_CPOL | SPI_CPHA;
+       master->bits_per_word_mask = SPI_BPW_RANGE_MASK(8, 16);
        master->setup = mcfqspi_setup;
        master->transfer_one_message = mcfqspi_transfer_one_message;
        master->prepare_transfer_hardware = mcfqspi_prepare_transfer_hw;
 
         * Assign function pointer to appropriate transfer method
         * 8bit, 16bit or 32bit transfer
         */
-       if (bits_per_word <= 8 && bits_per_word >= 2) {
+       if (bits_per_word <= 8) {
                dspi->get_rx = davinci_spi_rx_buf_u8;
                dspi->get_tx = davinci_spi_tx_buf_u8;
                dspi->bytes_per_word[spi->chip_select] = 1;
-       } else if (bits_per_word <= 16 && bits_per_word >= 2) {
+       } else {
                dspi->get_rx = davinci_spi_rx_buf_u16;
                dspi->get_tx = davinci_spi_tx_buf_u16;
                dspi->bytes_per_word[spi->chip_select] = 2;
-       } else
-               return -EINVAL;
+       }
 
        if (!hz)
                hz = spi->max_speed_hz;
        master->dev.of_node = pdev->dev.of_node;
        master->bus_num = pdev->id;
        master->num_chipselect = pdata->num_chipselect;
+       master->bits_per_word_mask = SPI_BPW_RANGE_MASK(2, 16);
        master->setup = davinci_spi_setup;
 
        dspi->bitbang.chipselect = davinci_spi_chipselect;
 
        }
        if (transfer->bits_per_word) {
                bits = transfer->bits_per_word;
-
-               switch (bits) {
-               case 8:
-               case 16:
-                       dws->n_bytes = dws->dma_width = bits >> 3;
-                       break;
-               default:
-                       printk(KERN_ERR "MRST SPI0: unsupported bits:"
-                               "%db\n", bits);
-                       message->status = -EIO;
-                       goto early_exit;
-               }
-
+               dws->n_bytes = dws->dma_width = bits >> 3;
                cr0 = (bits - 1)
                        | (chip->type << SPI_FRF_OFFSET)
                        | (spi->mode << SPI_MODE_OFFSET)
        struct dw_spi_chip *chip_info = NULL;
        struct chip_data *chip;
 
-       if (spi->bits_per_word != 8 && spi->bits_per_word != 16)
-               return -EINVAL;
-
        /* Only alloc on first setup */
        chip = spi_get_ctldata(spi);
        if (!chip) {
                chip->enable_dma = chip_info->enable_dma;
        }
 
-       if (spi->bits_per_word <= 8) {
+       if (spi->bits_per_word == 8) {
                chip->n_bytes = 1;
                chip->dma_width = 1;
-       } else if (spi->bits_per_word <= 16) {
+       } else if (spi->bits_per_word == 16) {
                chip->n_bytes = 2;
                chip->dma_width = 2;
-       } else {
-               /* Never take >16b case for MRST SPIC */
-               dev_err(&spi->dev, "invalid wordsize\n");
-               return -EINVAL;
        }
        chip->bits_per_word = spi->bits_per_word;
 
        }
 
        master->mode_bits = SPI_CPOL | SPI_CPHA;
+       master->bits_per_word_mask = SPI_BPW_MASK(8) | SPI_BPW_MASK(16);
        master->bus_num = dws->bus_num;
        master->num_chipselect = dws->num_cs;
        master->cleanup = dw_spi_cleanup;
 
        struct ep93xx_spi *espi = spi_master_get_devdata(spi->master);
        struct ep93xx_spi_chip *chip;
 
-       if (spi->bits_per_word < 4 || spi->bits_per_word > 16) {
-               dev_err(&espi->pdev->dev, "invalid bits per word %d\n",
-                       spi->bits_per_word);
-               return -EINVAL;
-       }
-
        chip = spi_get_ctldata(spi);
        if (!chip) {
                dev_dbg(&espi->pdev->dev, "initial setup for %s\n",
 
        /* first validate each transfer */
        list_for_each_entry(t, &msg->transfers, transfer_list) {
-               if (t->bits_per_word) {
-                       if (t->bits_per_word < 4 || t->bits_per_word > 16)
-                               return -EINVAL;
-               }
                if (t->speed_hz && t->speed_hz < espi->min_rate)
                                return -EINVAL;
        }
        master->bus_num = pdev->id;
        master->num_chipselect = info->num_chipselect;
        master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH;
+       master->bits_per_word_mask = SPI_BPW_RANGE_MASK(4, 16);
 
        platform_set_drvdata(pdev, master);
 
 
        if (!bits_per_word)
                bits_per_word = spi->bits_per_word;
 
-       /* Make sure its a bit width we support [4..16] */
-       if ((bits_per_word < 4) || (bits_per_word > 16))
-               return -EINVAL;
-
        if (!hz)
                hz = spi->max_speed_hz;
 
        cs->get_tx = mpc8xxx_spi_tx_buf_u32;
        if (bits_per_word <= 8) {
                cs->rx_shift = 8 - bits_per_word;
-       } else if (bits_per_word <= 16) {
+       } else
                cs->rx_shift = 16 - bits_per_word;
                if (spi->mode & SPI_LSB_FIRST)
                        cs->get_tx = fsl_espi_tx_buf_lsb;
-       } else {
-               return -EINVAL;
        }
 
        mpc8xxx_spi->rx_shift = cs->rx_shift;
        if (ret)
                goto err_probe;
 
+       master->bits_per_word_mask = SPI_BPW_RANGE_MASK(4, 16);
        master->setup = fsl_espi_setup;
 
        mpc8xxx_spi = spi_master_get_devdata(master);
 
        struct spi_gpio         *spi_gpio = spi_to_spi_gpio(spi);
        struct device_node      *np = spi->master->dev.of_node;
 
-       if (spi->bits_per_word > 32)
-               return -EINVAL;
-
        if (np) {
                /*
                 * In DT environments, the CS GPIOs have already been
        if (pdata)
                spi_gpio->pdata = *pdata;
 
+       master->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 32);
        master->flags = master_flags;
        master->bus_num = pdev->id;
        master->num_chipselect = SPI_N_CHIPSEL;
 
        } else if (config.bpw <= 16) {
                spi_imx->rx = spi_imx_buf_rx_u16;
                spi_imx->tx = spi_imx_buf_tx_u16;
-       } else if (config.bpw <= 32) {
+       }
                spi_imx->rx = spi_imx_buf_rx_u32;
                spi_imx->tx = spi_imx_buf_tx_u32;
-       } else
-               BUG();
+       }
 
        spi_imx->devtype_data->config(spi_imx, &config);
 
 
        platform_set_drvdata(pdev, master);
 
+       master->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 32);
        master->bus_num = pdev->id;
        master->num_chipselect = num_cs;
 
 
        if (t && t->bits_per_word)
                bits_per_word = t->bits_per_word;
 
-       if (bits_per_word != 8) {
-               dev_err(&dev->dev, "%s, unsupported bits_per_word=%d\n",
-                                       __func__, bits_per_word);
-               return -EINVAL;
-       }
-
        hz = dev->max_speed_hz;
        if (t && t->speed_hz)
                hz = min(hz, t->speed_hz);
 
        master->transfer_one_message = mxs_spi_transfer_one;
        master->setup = mxs_spi_setup;
+       master->bits_per_word_mask = SPI_BPW_MASK(8);
        master->mode_bits = SPI_CPOL | SPI_CPHA;
        master->num_chipselect = 3;
        master->dev.of_node = np;
 
        spin_unlock_irqrestore(&hw->lock, flags);
 }
 
-static int nuc900_spi_setupxfer(struct spi_device *spi,
-                                struct spi_transfer *t)
-{
-       return 0;
-}
-
-static int nuc900_spi_setup(struct spi_device *spi)
-{
-       return 0;
-}
-
 static inline unsigned int hw_txbyte(struct nuc900_spi *hw, int count)
 {
        return hw->tx ? hw->tx[count] : 0;
        master->num_chipselect     = hw->pdata->num_cs;
        master->bus_num            = hw->pdata->bus_num;
        hw->bitbang.master         = hw->master;
-       hw->bitbang.setup_transfer = nuc900_spi_setupxfer;
        hw->bitbang.chipselect     = nuc900_spi_chipsel;
        hw->bitbang.txrx_bufs      = nuc900_spi_txrx;
-       hw->bitbang.master->setup  = nuc900_spi_setup;
 
        hw->res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
        if (hw->res == NULL) {
 
        struct omap1_spi100k    *spi100k;
        struct omap1_spi100k_cs *cs = spi->controller_state;
 
-       if (spi->bits_per_word < 4 || spi->bits_per_word > 32) {
-                dev_dbg(&spi->dev, "setup: unsupported %d bit words\n",
-                       spi->bits_per_word);
-                return -EINVAL;
-       }
-
        spi100k = spi_master_get_devdata(spi->master);
 
        if (!cs) {
                unsigned        len = t->len;
 
                if (t->speed_hz > OMAP1_SPI100K_MAX_FREQ
-                               || (len && !(rx_buf || tx_buf))
-                               || (t->bits_per_word &&
-                                       (  t->bits_per_word < 4
-                                       || t->bits_per_word > 32))) {
+                               || (len && !(rx_buf || tx_buf))) {
                        dev_dbg(&spi->dev, "transfer: %d Hz, %d %s%s, %d bpw\n",
                                        t->speed_hz,
                                        len,
        master->cleanup = NULL;
        master->num_chipselect = 2;
        master->mode_bits = MODEBITS;
+       master->bits_per_word_mask = SPI_BPW_RANGE_MASK(4, 32);
 
        dev_set_drvdata(&pdev->dev, master);
 
 
        struct omap2_mcspi_dma  *mcspi_dma;
        struct omap2_mcspi_cs   *cs = spi->controller_state;
 
-       if (spi->bits_per_word < 4 || spi->bits_per_word > 32) {
-               dev_dbg(&spi->dev, "setup: unsupported %d bit words\n",
-                       spi->bits_per_word);
-               return -EINVAL;
-       }
-
        mcspi_dma = &mcspi->dma_channels[spi->chip_select];
 
        if (!cs) {
                unsigned        len = t->len;
 
                if (t->speed_hz > OMAP2_MCSPI_MAX_FREQ
-                               || (len && !(rx_buf || tx_buf))
-                               || (t->bits_per_word &&
-                                       (  t->bits_per_word < 4
-                                          || t->bits_per_word > 32))) {
+                               || (len && !(rx_buf || tx_buf))) {
                        dev_dbg(mcspi->dev, "transfer: %d Hz, %d %s%s, %d bpw\n",
                                        t->speed_hz,
                                        len,
 
        /* the spi->mode bits understood by this driver: */
        master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH;
-
+       master->bits_per_word_mask = SPI_BPW_RANGE_MASK(4, 32);
        master->setup = omap2_mcspi_setup;
        master->prepare_transfer_hardware = omap2_prepare_transfer;
        master->unprepare_transfer_hardware = omap2_unprepare_transfer;
 
                        speed = min(t->speed_hz, spi->max_speed_hz);
        }
 
-       if (bits_per_word != 8) {
-               dev_err(&spi->dev, "invalid bits-per-word (%d)\n",
-                               bits_per_word);
-               return -EINVAL;
-       }
-
        if (!speed || (speed > spi->max_speed_hz)) {
                dev_err(&spi->dev, "invalid speed_hz (%d)\n", speed);
                return -EINVAL;
 {
        struct spi_ppc4xx_cs *cs = spi->controller_state;
 
-       if (spi->bits_per_word != 8) {
-               dev_err(&spi->dev, "invalid bits-per-word (%d)\n",
-                       spi->bits_per_word);
-               return -EINVAL;
-       }
-
        if (!spi->max_speed_hz) {
                dev_err(&spi->dev, "invalid max_speed_hz (must be non-zero)\n");
                return -EINVAL;
        bbp->use_dma = 0;
        bbp->master->setup = spi_ppc4xx_setup;
        bbp->master->cleanup = spi_ppc4xx_cleanup;
+       bbp->master->bits_per_word_mask = SPI_BPW_MASK(8);
 
        /* the spi->mode bits understood by this driver: */
        bbp->master->mode_bits =
 
                rx_thres = RX_THRESH_DFLT;
        }
 
-       if (!pxa25x_ssp_comp(drv_data)
-               && (spi->bits_per_word < 4 || spi->bits_per_word > 32)) {
-               dev_err(&spi->dev, "failed setup: ssp_type=%d, bits/wrd=%d "
-                               "b/w not 4-32 for type non-PXA25x_SSP\n",
-                               drv_data->ssp_type, spi->bits_per_word);
-               return -EINVAL;
-       } else if (pxa25x_ssp_comp(drv_data)
-                       && (spi->bits_per_word < 4
-                               || spi->bits_per_word > 16)) {
-               dev_err(&spi->dev, "failed setup: ssp_type=%d, bits/wrd=%d "
-                               "b/w not 4-16 for type PXA25x_SSP\n",
-                               drv_data->ssp_type, spi->bits_per_word);
-               return -EINVAL;
-       }
-
        /* Only alloc on first setup */
        chip = spi_get_ctldata(spi);
        if (!chip) {
                chip->n_bytes = 4;
                chip->read = u32_reader;
                chip->write = u32_writer;
-       } else {
-               dev_err(&spi->dev, "invalid wordsize\n");
-               return -ENODEV;
        }
        chip->bits_per_word = spi->bits_per_word;
 
        drv_data->ioaddr = ssp->mmio_base;
        drv_data->ssdr_physical = ssp->phys_base + SSDR;
        if (pxa25x_ssp_comp(drv_data)) {
+               master->bits_per_word_mask = SPI_BPW_RANGE_MASK(4, 16);
                drv_data->int_cr1 = SSCR1_TIE | SSCR1_RIE;
                drv_data->dma_cr1 = 0;
                drv_data->clear_sr = SSSR_ROR;
                drv_data->mask_sr = SSSR_RFS | SSSR_TFS | SSSR_ROR;
        } else {
+               master->bits_per_word_mask = SPI_BPW_RANGE_MASK(4, 32);
                drv_data->int_cr1 = SSCR1_TIE | SSCR1_RIE | SSCR1_TINTE;
                drv_data->dma_cr1 = DEFAULT_DMA_CR1;
                drv_data->clear_sr = SSSR_ROR | SSSR_TINT;
 
        master->unprepare_transfer_hardware = s3c64xx_spi_unprepare_transfer;
        master->num_chipselect = sci->num_cs;
        master->dma_alignment = 8;
-       master->bits_per_word_mask = BIT(32 - 1) | BIT(16 - 1) | BIT(8 - 1);
+       master->bits_per_word_mask = SPI_BPW_MASK(32) | SPI_BPW_MASK(16) |
+                                       SPI_BPW_MASK(8);
        /* the spi->mode bits understood by this driver: */
        master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH;
 
 
                rxfifo_ctrl = SIRFSOC_SPI_FIFO_THD(SIRFSOC_SPI_FIFO_SIZE / 2) |
                                        SIRFSOC_SPI_FIFO_WIDTH_DWORD;
                break;
-       default:
-               dev_err(&spi->dev, "Bits per word %d not supported\n",
-                      bits_per_word);
-               return -EINVAL;
        }
 
        if (!(spi->mode & SPI_CS_HIGH))
        sspi->bitbang.txrx_bufs = spi_sirfsoc_transfer;
        sspi->bitbang.master->setup = spi_sirfsoc_setup;
        master->bus_num = pdev->id;
+       master->bits_per_word_mask = SPI_BPW_MASK(8) | SPI_BPW_MASK(12) |
+                                       SPI_BPW_MASK(16) | SPI_BPW_MASK(32);
        sspi->bitbang.master->dev.of_node = pdev->dev.of_node;
 
        sspi->p = pinctrl_get_select_default(&pdev->dev);
 
        spin_unlock(&hw->lock);
 }
 
-static int ti_ssp_spi_setup(struct spi_device *spi)
-{
-       if (spi->bits_per_word > 32)
-               return -EINVAL;
-
-       return 0;
-}
-
 static int ti_ssp_spi_transfer(struct spi_device *spi, struct spi_message *m)
 {
        struct ti_ssp_spi       *hw;
                        dev_err(&spi->dev, "invalid xfer, full duplex\n");
                        return -EINVAL;
                }
-
-               if (t->bits_per_word > 32) {
-                       dev_err(&spi->dev, "invalid xfer width %d\n",
-                               t->bits_per_word);
-                       return -EINVAL;
-               }
        }
 
        spin_lock(&hw->lock);
        master->bus_num         = pdev->id;
        master->num_chipselect  = pdata->num_cs;
        master->mode_bits       = MODE_BITS;
+       master->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 32);
        master->flags           = SPI_MASTER_HALF_DUPLEX;
-       master->setup           = ti_ssp_spi_setup;
        master->transfer        = ti_ssp_spi_transfer;
 
        error = spi_register_master(master);
 
                dev_dbg(&pspi->dev, "%s 8 bits per word\n", __func__);
        }
 
-       if ((pspi->bits_per_word != 8) && (pspi->bits_per_word != 16)) {
-               dev_err(&pspi->dev, "%s Invalid bits per word\n", __func__);
-               return -EINVAL;
-       }
-
        /* Check baud rate setting */
        /* if baud rate of chip is greater than
           max we can support,return error */
                /* if baud rate has been specified validate the same */
                if (transfer->speed_hz > PCH_MAX_BAUDRATE)
                        transfer->speed_hz = PCH_MAX_BAUDRATE;
-
-               /* if bits per word has been specified validate the same */
-               if (transfer->bits_per_word) {
-                       if ((transfer->bits_per_word != 8)
-                           && (transfer->bits_per_word != 16)) {
-                               retval = -EINVAL;
-                               dev_err(&pspi->dev,
-                                       "%s Invalid bits per word\n", __func__);
-                               goto err_return_spinlock;
-                       }
-               }
        }
        spin_unlock_irqrestore(&data->lock, flags);
 
        master->setup = pch_spi_setup;
        master->transfer = pch_spi_transfer;
        master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_LSB_FIRST;
+       master->bits_per_word_mask = SPI_BPW_MASK(8) | SPI_BPW_MASK(16);
 
        data->board_dat = board_dat;
        data->plat_dev = plat_dev;
 
 static int txx9spi_setup(struct spi_device *spi)
 {
        struct txx9spi *c = spi_master_get_devdata(spi->master);
-       u8 bits_per_word;
 
        if (!spi->max_speed_hz
                        || spi->max_speed_hz > c->max_speed_hz
                        || spi->max_speed_hz < c->min_speed_hz)
                return -EINVAL;
 
-       bits_per_word = spi->bits_per_word;
-       if (bits_per_word != 8 && bits_per_word != 16)
-               return -EINVAL;
-
        if (gpio_direction_output(spi->chip_select,
                        !(spi->mode & SPI_CS_HIGH))) {
                dev_err(&spi->dev, "Cannot setup GPIO for chipselect.\n");
 
                if (!t->tx_buf && !t->rx_buf && t->len)
                        return -EINVAL;
-               if (bits_per_word != 8 && bits_per_word != 16)
-                       return -EINVAL;
                if (t->len & ((bits_per_word >> 3) - 1))
                        return -EINVAL;
                if (speed_hz < c->min_speed_hz || speed_hz > c->max_speed_hz)
        master->setup = txx9spi_setup;
        master->transfer = txx9spi_transfer;
        master->num_chipselect = (u16)UINT_MAX; /* any GPIO numbers */
+       master->bits_per_word_mask = SPI_BPW_MASK(8) | SPI_BPW_MASK(16);
 
        ret = spi_register_master(master);
        if (ret)
 
 {
        unsigned int speed;
 
-       if ((t->bits_per_word && t->bits_per_word != 8) || t->len > 62)
+       if (t->len > 62)
                return -EINVAL;
 
        speed = t->speed_hz ? t->speed_hz : spi->max_speed_hz;
        return status;
 }
 
-static int spi_xcomm_setup(struct spi_device *spi)
-{
-       if (spi->bits_per_word != 8)
-               return -EINVAL;
-
-       return 0;
-}
-
 static int spi_xcomm_probe(struct i2c_client *i2c,
        const struct i2c_device_id *id)
 {
 
        master->num_chipselect = 16;
        master->mode_bits = SPI_CPHA | SPI_CPOL | SPI_3WIRE;
+       master->bits_per_word_mask = SPI_BPW_MASK(8);
        master->flags = SPI_MASTER_HALF_DUPLEX;
-       master->setup = spi_xcomm_setup;
        master->transfer_one_message = spi_xcomm_transfer_one;
        master->dev.of_node = i2c->dev.of_node;
        i2c_set_clientdata(i2c, master);
 
        return 0;
 }
 
-static int xilinx_spi_setup(struct spi_device *spi)
-{
-       /* always return 0, we can not check the number of bits.
-        * There are cases when SPI setup is called before any driver is
-        * there, in that case the SPI core defaults to 8 bits, which we
-        * do not support in some cases. But if we return an error, the
-        * SPI device would not be registered and no driver can get hold of it
-        * When the driver is there, it will call SPI setup again with the
-        * correct number of bits per transfer.
-        * If a driver setups with the wrong bit number, it will fail when
-        * it tries to do a transfer
-        */
-       return 0;
-}
-
 static void xilinx_spi_fill_tx_fifo(struct xilinx_spi *xspi)
 {
        u8 sr;
        xspi->bitbang.chipselect = xilinx_spi_chipselect;
        xspi->bitbang.setup_transfer = xilinx_spi_setup_transfer;
        xspi->bitbang.txrx_bufs = xilinx_spi_txrx_bufs;
-       xspi->bitbang.master->setup = xilinx_spi_setup;
        init_completion(&xspi->done);
 
        if (!request_mem_region(mem->start, resource_size(mem),