#define PCI_DEVICE_ID_AMD_1AH_M00H_ROOT                0x153a
 #define PCI_DEVICE_ID_AMD_1AH_M20H_ROOT                0x1507
 #define PCI_DEVICE_ID_AMD_MI200_ROOT           0x14bb
+#define PCI_DEVICE_ID_AMD_MI300_ROOT           0x14f8
 
 #define PCI_DEVICE_ID_AMD_17H_DF_F4            0x1464
 #define PCI_DEVICE_ID_AMD_17H_M10H_DF_F4       0x15ec
 #define PCI_DEVICE_ID_AMD_19H_M78H_DF_F4       0x12fc
 #define PCI_DEVICE_ID_AMD_1AH_M00H_DF_F4       0x12c4
 #define PCI_DEVICE_ID_AMD_MI200_DF_F4          0x14d4
+#define PCI_DEVICE_ID_AMD_MI300_DF_F4          0x152c
 
 /* Protect the PCI config register pairs used for SMN. */
 static DEFINE_MUTEX(smn_mutex);
        { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_1AH_M00H_ROOT) },
        { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_1AH_M20H_ROOT) },
        { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_MI200_ROOT) },
+       { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_MI300_ROOT) },
        {}
 };
 
        { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_1AH_M00H_DF_F3) },
        { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_1AH_M20H_DF_F3) },
        { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_MI200_DF_F3) },
+       { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_MI300_DF_F3) },
        {}
 };
 
        { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CNB17H_F4) },
        { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_1AH_M00H_DF_F4) },
        { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_MI200_DF_F4) },
+       { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_MI300_DF_F4) },
        {}
 };
 
 
 #define PCI_DEVICE_ID_AMD_1AH_M00H_DF_F3 0x12c3
 #define PCI_DEVICE_ID_AMD_1AH_M20H_DF_F3 0x16fb
 #define PCI_DEVICE_ID_AMD_MI200_DF_F3  0x14d3
+#define PCI_DEVICE_ID_AMD_MI300_DF_F3  0x152b
 #define PCI_DEVICE_ID_AMD_CNB17H_F3    0x1703
 #define PCI_DEVICE_ID_AMD_LANCE                0x2000
 #define PCI_DEVICE_ID_AMD_LANCE_HOME   0x2001