.rpadir_value   = 2 << 16,
        .no_trimd       = 1,
        .no_ade         = 1,
+       .xdfar_rw       = 1,
        .hw_checksum    = 1,
        .tsu            = 1,
 };
        .rpadir_value   = 2 << 16,
        .no_trimd       = 1,
        .no_ade         = 1,
+       .xdfar_rw       = 1,
        .hw_checksum    = 1,
        .tsu            = 1,
        .select_mii     = 1,
        .rpadir_value   = 2 << 16,
        .no_trimd       = 1,
        .no_ade         = 1,
+       .xdfar_rw       = 1,
        .tsu            = 1,
        .dual_port      = 1,
 };
        .hw_swap        = 1,
        .no_trimd       = 1,
        .no_ade         = 1,
+       .xdfar_rw       = 1,
        .tsu            = 1,
        .hw_checksum    = 1,
        .select_mii     = 1,
        .hw_swap        = 1,
        .no_trimd       = 1,
        .no_ade         = 1,
+       .xdfar_rw       = 1,
        .tsu            = 1,
        .irq_flags      = IRQF_SHARED,
        .magic          = 1,
                /* Rx descriptor address set */
                if (i == 0) {
                        sh_eth_write(ndev, mdp->rx_desc_dma, RDLAR);
-                       if (sh_eth_is_gether(mdp) ||
-                           sh_eth_is_rz_fast_ether(mdp))
+                       if (mdp->cd->xdfar_rw)
                                sh_eth_write(ndev, mdp->rx_desc_dma, RDFAR);
                }
        }
                if (i == 0) {
                        /* Tx descriptor address set */
                        sh_eth_write(ndev, mdp->tx_desc_dma, TDLAR);
-                       if (sh_eth_is_gether(mdp) ||
-                           sh_eth_is_rz_fast_ether(mdp))
+                       if (mdp->cd->xdfar_rw)
                                sh_eth_write(ndev, mdp->tx_desc_dma, TDFAR);
                }
        }
 
        unsigned rpadir:1;      /* E-DMAC have RPADIR */
        unsigned no_trimd:1;    /* E-DMAC DO NOT have TRIMD */
        unsigned no_ade:1;      /* E-DMAC DO NOT have ADE bit in EESR */
+       unsigned xdfar_rw:1;    /* E-DMAC has writeable RDFAR/TDFAR */
        unsigned hw_checksum:1; /* E-DMAC has CSMR */
        unsigned select_mii:1;  /* EtherC have RMII_MII (MII select register) */
        unsigned rmiimode:1;    /* EtherC has RMIIMODE register */