snd_soc_component_force_bias_level(component, SND_SOC_BIAS_OFF);
 
-       regmap_write(rt5677->regmap, RT5677_DIG_MISC, 0x0020);
+       regmap_update_bits(rt5677->regmap, RT5677_DIG_MISC,
+                       ~RT5677_IRQ_DEBOUNCE_SEL_MASK, 0x0020);
        regmap_write(rt5677->regmap, RT5677_PWR_DSP2, 0x0c00);
 
        for (i = 0; i < RT5677_GPIO_NUM; i++)
                rt5677_gpio_config(rt5677, i, rt5677->pdata.gpio_config[i]);
 
-       if (rt5677->irq_data) {
-               regmap_update_bits(rt5677->regmap, RT5677_GPIO_CTRL1, 0x8000,
-                       0x8000);
-               regmap_update_bits(rt5677->regmap, RT5677_DIG_MISC, 0x0018,
-                       0x0008);
-
-               if (rt5677->pdata.jd1_gpio)
-                       regmap_update_bits(rt5677->regmap, RT5677_JD_CTRL1,
-                               RT5677_SEL_GPIO_JD1_MASK,
-                               rt5677->pdata.jd1_gpio <<
-                               RT5677_SEL_GPIO_JD1_SFT);
-
-               if (rt5677->pdata.jd2_gpio)
-                       regmap_update_bits(rt5677->regmap, RT5677_JD_CTRL1,
-                               RT5677_SEL_GPIO_JD2_MASK,
-                               rt5677->pdata.jd2_gpio <<
-                               RT5677_SEL_GPIO_JD2_SFT);
-
-               if (rt5677->pdata.jd3_gpio)
-                       regmap_update_bits(rt5677->regmap, RT5677_JD_CTRL1,
-                               RT5677_SEL_GPIO_JD3_MASK,
-                               rt5677->pdata.jd3_gpio <<
-                               RT5677_SEL_GPIO_JD3_SFT);
-       }
-
        mutex_init(&rt5677->dsp_cmd_lock);
        mutex_init(&rt5677->dsp_pri_lock);
 
 {
        int ret;
        struct rt5677_priv *rt5677 = i2c_get_clientdata(i2c);
+       unsigned int jd_mask = 0, jd_val = 0;
 
        if (!rt5677->pdata.jd1_gpio &&
                !rt5677->pdata.jd2_gpio &&
                return -EINVAL;
        }
 
+       /*
+        * Select RC as the debounce clock so that GPIO works even when
+        * MCLK is gated which happens when there is no audio stream
+        * (SND_SOC_BIAS_OFF).
+        */
+       regmap_update_bits(rt5677->regmap, RT5677_DIG_MISC,
+                       RT5677_IRQ_DEBOUNCE_SEL_MASK,
+                       RT5677_IRQ_DEBOUNCE_SEL_RC);
+
+       /* Enable auto power on RC when GPIO states are changed */
+       regmap_update_bits(rt5677->regmap, RT5677_GEN_CTRL1, 0xff, 0xff);
+
+       /* Select and enable jack detection sources per platform data */
+       if (rt5677->pdata.jd1_gpio) {
+               jd_mask |= RT5677_SEL_GPIO_JD1_MASK;
+               jd_val  |= rt5677->pdata.jd1_gpio << RT5677_SEL_GPIO_JD1_SFT;
+       }
+       if (rt5677->pdata.jd2_gpio) {
+               jd_mask |= RT5677_SEL_GPIO_JD2_MASK;
+               jd_val  |= rt5677->pdata.jd2_gpio << RT5677_SEL_GPIO_JD2_SFT;
+       }
+       if (rt5677->pdata.jd3_gpio) {
+               jd_mask |= RT5677_SEL_GPIO_JD3_MASK;
+               jd_val  |= rt5677->pdata.jd3_gpio << RT5677_SEL_GPIO_JD3_SFT;
+       }
+       regmap_update_bits(rt5677->regmap, RT5677_JD_CTRL1, jd_mask, jd_val);
+
+       /* Set GPIO1 pin to be IRQ output */
+       regmap_update_bits(rt5677->regmap, RT5677_GPIO_CTRL1,
+                       RT5677_GPIO1_PIN_MASK, RT5677_GPIO1_PIN_IRQ);
+
        ret = regmap_add_irq_chip(rt5677->regmap, i2c->irq,
                IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING | IRQF_ONESHOT, 0,
                &rt5677_irq_chip, &rt5677->irq_data);