riscv: dts: sophgo: cv1800b: add pinctrl support

Add pinctrl node and related pin configuration for CV1800B SoC.

Link: https://lore.kernel.org/r/IA1PR20MB49535E7F28242174CA318317BB992@IA1PR20MB4953.namprd20.prod.outlook.com
Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>

diff --git a/arch/riscv/boot/dts/sophgo/cv1800b-milkv-duo.dts b/arch/riscv/boot/dts/sophgo/cv1800b-milkv-duo.dts
index 375ff2661b6e257cfddce2381663f61e12748c14..9feb520eaec41bfb73f428aa4f808c6e8172b433 100644 (file)
--- a/arch/riscv/boot/dts/sophgo/cv1800b-milkv-duo.dts
+++ b/arch/riscv/boot/dts/sophgo/cv1800b-milkv-duo.dts
@@ -39,7 +39,54 @@
        clock-frequency = <25000000>;
 };
 
+&pinctrl {
+       uart0_cfg: uart0-cfg {
+               uart0-pins {
+                       pinmux = <PINMUX(PIN_UART0_TX, 0)>,
+                                <PINMUX(PIN_UART0_RX, 0)>;
+                       bias-pull-up;
+                       drive-strength-microamp = <10800>;
+                       power-source = <3300>;
+               };
+       };
+
+       sdhci0_cfg: sdhci0-cfg {
+               sdhci0-clk-pins {
+                       pinmux = <PINMUX(PIN_SD0_CLK, 0)>;
+                       bias-pull-up;
+                       drive-strength-microamp = <16100>;
+                       power-source = <3300>;
+               };
+
+               sdhci0-cmd-pins {
+                       pinmux = <PINMUX(PIN_SD0_CMD, 0)>;
+                       bias-pull-up;
+                       drive-strength-microamp = <10800>;
+                       power-source = <3300>;
+               };
+
+               sdhci0-data-pins {
+                       pinmux = <PINMUX(PIN_SD0_D0, 0)>,
+                                <PINMUX(PIN_SD0_D1, 0)>,
+                                <PINMUX(PIN_SD0_D2, 0)>,
+                                <PINMUX(PIN_SD0_D3, 0)>;
+                       bias-pull-up;
+                       drive-strength-microamp = <10800>;
+                       power-source = <3300>;
+               };
+
+               sdhci0-cd-pins {
+                       pinmux = <PINMUX(PIN_SD0_CD, 0)>;
+                       bias-pull-up;
+                       drive-strength-microamp = <10800>;
+                       power-source = <3300>;
+               };
+       };
+};
+
 &sdhci0 {
+       pinctrl-0 = <&sdhci0_cfg>;
+       pinctrl-names = "default";
        status = "okay";
        bus-width = <4>;
        no-1-8-v;
@@ -49,5 +96,7 @@
 };
 
 &uart0 {
+       pinctrl-0 = <&uart0_cfg>;
+       pinctrl-names = "default";
        status = "okay";
 };

diff --git a/arch/riscv/boot/dts/sophgo/cv1800b.dtsi b/arch/riscv/boot/dts/sophgo/cv1800b.dtsi
index ec9530972ae2bbb6b319c4db694c8a5633c0bed9..aa1f5df100f0743a923269d48ab142a2cf433719 100644 (file)
--- a/arch/riscv/boot/dts/sophgo/cv1800b.dtsi
+++ b/arch/riscv/boot/dts/sophgo/cv1800b.dtsi
@@ -3,6 +3,7 @@
  * Copyright (C) 2023 Jisheng Zhang <jszhang@kernel.org>
  */
 
+#include <dt-bindings/pinctrl/pinctrl-cv1800b.h>
 #include "cv18xx.dtsi"
 
 / {
@@ -12,6 +13,15 @@
                device_type = "memory";
                reg = <0x80000000 0x4000000>;
        };
+
+       soc {
+               pinctrl: pinctrl@3001000 {
+                       compatible = "sophgo,cv1800b-pinctrl";
+                       reg = <0x03001000 0x1000>,
+                             <0x05027000 0x1000>;
+                       reg-names = "sys", "rtc";
+               };
+       };
 };
 
 &plic {