// SPDX-License-Identifier: GPL-2.0 OR MIT
 /**************************************************************************
  *
- * Copyright 2009-2015 VMware, Inc., Palo Alto, CA., USA
+ * Copyright 2009-2022 VMware, Inc., Palo Alto, CA., USA
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
  * copy of this software and associated documentation files (the
 
 #include "vmwgfx_drv.h"
 #include "vmwgfx_devcaps.h"
-#include <drm/vmwgfx_drm.h>
 #include "vmwgfx_kms.h"
 
+#include <drm/vmwgfx_drm.h>
+#include <linux/pci.h>
+
 int vmw_getparam_ioctl(struct drm_device *dev, void *data,
                       struct drm_file *file_priv)
 {
                break;
        case DRM_VMW_PARAM_FIFO_HW_VERSION:
        {
-               if ((dev_priv->capabilities & SVGA_CAP_GBOBJECTS)) {
+               if ((dev_priv->capabilities & SVGA_CAP_GBOBJECTS))
                        param->value = SVGA3D_HWVERSION_WS8_B1;
-                       break;
-               }
-
-               param->value =
-                       vmw_fifo_mem_read(dev_priv,
-                                         ((vmw_fifo_caps(dev_priv) &
-                                           SVGA_FIFO_CAP_3D_HWVERSION_REVISED) ?
-                                                  SVGA_FIFO_3D_HWVERSION_REVISED :
-                                                  SVGA_FIFO_3D_HWVERSION));
+               else
+                       param->value = vmw_fifo_mem_read(
+                                              dev_priv,
+                                              ((vmw_fifo_caps(dev_priv) &
+                                                SVGA_FIFO_CAP_3D_HWVERSION_REVISED) ?
+                                                       SVGA_FIFO_3D_HWVERSION_REVISED :
+                                                       SVGA_FIFO_3D_HWVERSION));
                break;
        }
        case DRM_VMW_PARAM_MAX_SURF_MEMORY:
        case DRM_VMW_PARAM_GL43:
                param->value = has_gl43_context(dev_priv);
                break;
+       case DRM_VMW_PARAM_DEVICE_ID:
+               param->value = to_pci_dev(dev_priv->drm.dev)->device;
+               break;
        default:
                return -EINVAL;
        }
 
 /**************************************************************************
  *
- * Copyright © 2009-2015 VMware, Inc., Palo Alto, CA., USA
+ * Copyright © 2009-2022 VMware, Inc., Palo Alto, CA., USA
  * All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
  *
  * DRM_VMW_PARAM_SM5
  * SM5 support is enabled.
+ *
+ * DRM_VMW_PARAM_GL43
+ * SM5.1+GL4.3 support is enabled.
+ *
+ * DRM_VMW_PARAM_DEVICE_ID
+ * PCI ID of the underlying SVGA device.
  */
 
 #define DRM_VMW_PARAM_NUM_STREAMS      0
 #define DRM_VMW_PARAM_SM4_1            14
 #define DRM_VMW_PARAM_SM5              15
 #define DRM_VMW_PARAM_GL43             16
+#define DRM_VMW_PARAM_DEVICE_ID        17
 
 /**
  * enum drm_vmw_handle_type - handle type for ref ioctls