drm/amd/display: fix s2idle entry for DCN3.5+

To be able to get to the lowest power state when suspending systems with
DCN3.5+, we must be in IPS before the display hardware is put into
D3cold. So, to ensure that the system always reaches the lowest power
state while suspending, force systems that support IPS to enter idle
optimizations before entering D3cold.

Reviewed-by: Roman Li <roman.li@amd.com>
Signed-off-by: Hamza Mahfooz <hamza.mahfooz@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index ec6064d40dbf3de6808b711369a7cb9a5bc7b7d1..fe8a88a7fe59d906c055b3af3404b64665e09185 100644 (file)
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -2904,6 +2904,9 @@ static int dm_suspend(void *handle)
 
        hpd_rx_irq_work_suspend(dm);
 
+       if (adev->dm.dc->caps.ips_support)
+               dc_allow_idle_optimizations(adev->dm.dc, true);
+
        dc_set_power_state(dm->dc, DC_ACPI_CM_POWER_STATE_D3);
        dc_dmub_srv_set_power_state(dm->dc->ctx->dmub_srv, DC_ACPI_CM_POWER_STATE_D3);