clk: renesas: r8a779h0: Add PCIe clock

Add the PCIe module clock, which is used by the PCIe module on the
Renesas R-Car V4M (R8A779H0) SoC.

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20240704061720.1444755-1-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

diff --git a/drivers/clk/renesas/r8a779h0-cpg-mssr.c b/drivers/clk/renesas/r8a779h0-cpg-mssr.c
index 16a2e26abcc7f798a04db5a783c0e21401abfa95..bfb55c15b39e049cf77093cdf8418fa7ce0ef220 100644 (file)
--- a/drivers/clk/renesas/r8a779h0-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a779h0-cpg-mssr.c
@@ -195,6 +195,7 @@ static const struct mssr_mod_clk r8a779h0_mod_clks[] = {
        DEF_MOD("msi3",         621,    R8A779H0_CLK_MSO),
        DEF_MOD("msi4",         622,    R8A779H0_CLK_MSO),
        DEF_MOD("msi5",         623,    R8A779H0_CLK_MSO),
+       DEF_MOD("pcie0",        624,    R8A779H0_CLK_S0D2_HSC),
        DEF_MOD("rpc-if",       629,    R8A779H0_CLK_RPCD2),
        DEF_MOD("scif0",        702,    R8A779H0_CLK_SASYNCPERD4),
        DEF_MOD("scif1",        703,    R8A779H0_CLK_SASYNCPERD4),