enic: Make MSI-X I/O interrupts come after the other required ones

The VIC hardware has a constraint that the MSIX interrupt used for errors
be specified as a 7 bit number.  Before this patch, it was allocated after
the I/O interrupts, which would cause a problem if 128 or more I/O
interrupts are in use.

So make the required interrupts come before the I/O interrupts to
guarantee the error interrupt offset never exceeds 7 bits.

Co-developed-by: John Daley <johndale@cisco.com>
Signed-off-by: John Daley <johndale@cisco.com>
Co-developed-by: Satish Kharat <satishkh@cisco.com>
Signed-off-by: Satish Kharat <satishkh@cisco.com>
Reviewed-by: Simon Horman <horms@kernel.org>
Signed-off-by: Nelson Escobar <neescoba@cisco.com>
Reviewed-by: Vadim Fedorenko <vadim.fedorenko@linux.dev>
Link: https://patch.msgid.link/20241113-remove_vic_resource_limits-v4-2-a34cf8570c67@cisco.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>

diff --git a/drivers/net/ethernet/cisco/enic/enic.h b/drivers/net/ethernet/cisco/enic/enic.h
index 07459eac2592ce5185321a619577404232cfbc2c..ec83a273d1ca40ae89f3c193207cf26814f6b277 100644 (file)
--- a/drivers/net/ethernet/cisco/enic/enic.h
+++ b/drivers/net/ethernet/cisco/enic/enic.h
@@ -280,18 +280,28 @@ static inline unsigned int enic_msix_wq_intr(struct enic *enic,
        return enic->cq[enic_cq_wq(enic, wq)].interrupt_offset;
 }
 
-static inline unsigned int enic_msix_err_intr(struct enic *enic)
-{
-       return enic->rq_count + enic->wq_count;
-}
+/* MSIX interrupts are organized as the error interrupt, then the notify
+ * interrupt followed by all the I/O interrupts.  The error interrupt needs
+ * to fit in 7 bits due to hardware constraints
+ */
+#define ENIC_MSIX_RESERVED_INTR 2
+#define ENIC_MSIX_ERR_INTR     0
+#define ENIC_MSIX_NOTIFY_INTR  1
+#define ENIC_MSIX_IO_INTR_BASE ENIC_MSIX_RESERVED_INTR
+#define ENIC_MSIX_MIN_INTR     (ENIC_MSIX_RESERVED_INTR + 2)
 
 #define ENIC_LEGACY_IO_INTR    0
 #define ENIC_LEGACY_ERR_INTR   1
 #define ENIC_LEGACY_NOTIFY_INTR        2
 
+static inline unsigned int enic_msix_err_intr(struct enic *enic)
+{
+       return ENIC_MSIX_ERR_INTR;
+}
+
 static inline unsigned int enic_msix_notify_intr(struct enic *enic)
 {
-       return enic->rq_count + enic->wq_count + 1;
+       return ENIC_MSIX_NOTIFY_INTR;
 }
 
 static inline bool enic_is_err_intr(struct enic *enic, int intr)

diff --git a/drivers/net/ethernet/cisco/enic/enic_res.c b/drivers/net/ethernet/cisco/enic/enic_res.c
index 60be09acb9fd56b642b7cabc77fac01f526b29a2..72b51e9d8d1a26a2cd18df9c9d702e5b11993b70 100644 (file)
--- a/drivers/net/ethernet/cisco/enic/enic_res.c
+++ b/drivers/net/ethernet/cisco/enic/enic_res.c
@@ -221,9 +221,12 @@ void enic_init_vnic_resources(struct enic *enic)
 
        switch (intr_mode) {
        case VNIC_DEV_INTR_MODE_INTX:
+               error_interrupt_enable = 1;
+               error_interrupt_offset = ENIC_LEGACY_ERR_INTR;
+               break;
        case VNIC_DEV_INTR_MODE_MSIX:
                error_interrupt_enable = 1;
-               error_interrupt_offset = enic->intr_count - 2;
+               error_interrupt_offset = enic_msix_err_intr(enic);
                break;
        default:
                error_interrupt_enable = 0;
@@ -249,15 +252,15 @@ void enic_init_vnic_resources(struct enic *enic)
 
        /* Init CQ resources
         *
-        * CQ[0 - n+m-1] point to INTR[0] for INTx, MSI
-        * CQ[0 - n+m-1] point to INTR[0 - n+m-1] for MSI-X
+        * All CQs point to INTR[0] for INTx, MSI
+        * CQ[i] point to INTR[ENIC_MSIX_IO_INTR_BASE + i] for MSI-X
         */
 
        for (i = 0; i < enic->cq_count; i++) {
 
                switch (intr_mode) {
                case VNIC_DEV_INTR_MODE_MSIX:
-                       interrupt_offset = i;
+                       interrupt_offset = ENIC_MSIX_IO_INTR_BASE + i;
                        break;
                default:
                        interrupt_offset = 0;