if ((ib->flags & AMDGPU_IB_FLAG_EMIT_MEM_SYNC) && ring->funcs->emit_mem_sync)
                ring->funcs->emit_mem_sync(ring);
 
+       if (ring->funcs->emit_wave_limit &&
+           ring->hw_prio == AMDGPU_GFX_PIPE_PRIO_HIGH)
+               ring->funcs->emit_wave_limit(ring, true);
+
        if (ring->funcs->insert_start)
                ring->funcs->insert_start(ring);
 
        ring->current_ctx = fence_ctx;
        if (vm && ring->funcs->emit_switch_buffer)
                amdgpu_ring_emit_switch_buffer(ring);
+
+       if (ring->funcs->emit_wave_limit &&
+           ring->hw_prio == AMDGPU_GFX_PIPE_PRIO_HIGH)
+               ring->funcs->emit_wave_limit(ring, false);
+
        amdgpu_ring_commit(ring);
        return 0;
 }