]> www.infradead.org Git - users/jedix/linux-maple.git/commitdiff
arm64: dts: allwinner: h616: enable Mali GPU for all boards
authorAndre Przywara <andre.przywara@arm.com>
Wed, 16 Apr 2025 22:48:39 +0000 (23:48 +0100)
committerChen-Yu Tsai <wens@csie.org>
Mon, 28 Apr 2025 03:34:34 +0000 (11:34 +0800)
All Allwinner H616/H618 SoCs contain a Mali G31 MP2 GPU.

Enable the DT nodes for that GPU, and specify the regulator providing
power to the VDD_GPU pins of the package. The rest of the DT node is set
by the SoC, so is not board specific.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Link: https://patch.msgid.link/20250416224839.9840-5-andre.przywara@arm.com
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
arch/arm64/boot/dts/allwinner/sun50i-h313-tanix-tx1.dts
arch/arm64/boot/dts/allwinner/sun50i-h616-bigtreetech-cb1.dtsi
arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi
arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts
arch/arm64/boot/dts/allwinner/sun50i-h616-x96-mate.dts
arch/arm64/boot/dts/allwinner/sun50i-h618-longan-module-3h.dtsi
arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero2w.dts
arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero3.dts
arch/arm64/boot/dts/allwinner/sun50i-h618-transpeed-8k618-t.dts
arch/arm64/boot/dts/allwinner/sun50i-h700-anbernic-rg35xx-2024.dts

index 17e6aef67aaf920ce0f0a3b25b0478fdfde4e760..7906b79c03898393d1e6f296b1a3d29c1982c775 100644 (file)
        status = "okay";
 };
 
+&gpu {
+       mali-supply = <&reg_dcdc1>;
+       status = "okay";
+};
+
 &ir {
        status = "okay";
 };
index d12b01c5f41b69029de04bc006be35c1ded3aeaa..bebfeb2a337a365b8cbbf1e8817a5713e42ca892 100644 (file)
        cpu-supply = <&reg_dcdc2>;
 };
 
+&gpu {
+       mali-supply = <&reg_dcdc1>;
+       status = "okay";
+};
+
 &mmc0 {
        vmmc-supply = <&reg_dldo1>;
        /* Card detection pin is not connected */
index 908fa3b847a6666614dcd9c21fb9f5ac7573f286..a8644fb52b04ef36a5aec8ca9abe137475dfbf56 100644 (file)
        status = "okay";
 };
 
+&gpu {
+       status = "okay";
+};
+
 &mdio0 {
        ext_rgmii_phy: ethernet-phy@1 {
                compatible = "ethernet-phy-ieee802.3-c22";
index a360d8567f95589832f4a402a88c1aae11ade033..f2e3300e078a90ce9d27f1e817e43856f2a83888 100644 (file)
        phy-supply = <&reg_dcdce>;
 };
 
+&gpu {
+       mali-supply = <&reg_dcdcc>;
+};
+
 &mmc0 {
        vmmc-supply = <&reg_dcdce>;
 };
index 968960ebf1d18c4aa09cea60ae1aec1c4cfb1292..085f3e4e8eaa806f138ab3cbd7f7f054cb1fb1a1 100644 (file)
        status = "okay";
 };
 
+&gpu {
+       mali-supply = <&reg_dcdcc>;
+       status = "okay";
+};
+
 &ir {
        status = "okay";
 };
index e92d150aaf1c154dd6f5d8e973a9f18762a71e38..3f416d129b7278fa3d73064a073a983d6cf3aa64 100644 (file)
        cpu-supply = <&reg_dcdc2>;
 };
 
+&gpu {
+       mali-supply = <&reg_dcdc1>;
+       status = "okay";
+};
+
 &mmc2 {
        pinctrl-names = "default";
        pinctrl-0 = <&mmc2_pins>;
index a0fe7a9afb77c246d846ef10e6c483d57b268287..b340bbcb710decaaa69866b5897d814bcf0f7f92 100644 (file)
 
 /* USB 2 & 3 are on the FPC connector (or the exansion board) */
 
+&gpu {
+       mali-supply = <&reg_dcdc1>;
+       status = "okay";
+};
+
 &mmc0 {
        cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>;  /* PF6 */
        bus-width = <4>;
index e1cd7572a14cebf22fd53689f99035f9e0cbcd91..c51d4d9120dee94dd258612a207b0b704d60ec45 100644 (file)
        motorcomm,clk-out-frequency-hz = <125000000>;
 };
 
+&gpu {
+       mali-supply = <&reg_dcdc1>;
+};
+
 &mmc0 {
        /*
         * The schematic shows the card detect pin wired up to PF6, via an
index f828ca1ce51ef499cf8f03f929353816d97f876b..efe0faa252f5e4db617b60919a884bac41613062 100644 (file)
        status = "okay";
 };
 
+&gpu {
+       mali-supply = <&reg_dcdc1>;
+       status = "okay";
+};
+
 &ir {
        status = "okay";
 };
index db058201a414c59b696995795659975230eec02e..1a750c5f6faca7ff0f2217ea1bb9b20b93147395 100644 (file)
        status = "okay";
 };
 
+&gpu {
+       mali-supply = <&reg_dcdc2>;
+       status = "okay";
+};
+
 &mmc0 {
        vmmc-supply = <&reg_cldo3>;
        disable-wp;