drm/amd/display: Program pixclk according to dcn revision

[WHY&HOW]
Pixel clock programming should be built per dcn revision, not hardcoded to use
dcn20.

Reviewed-by: Chris Park <chris.park@amd.com>
Acked-by: Wayne Lin <wayne.lin@amd.com>
Signed-off-by: Dillon Varone <dillon.varone@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c
index a2387cea1af9a184124121b3d631740e01c41484..d521fc65afe35d37d06bf90c1499c15c09e8f109 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c
@@ -1282,8 +1282,13 @@ void dcn20_build_pipe_pix_clk_params(struct pipe_ctx *pipe_ctx)
 
 static enum dc_status build_pipe_hw_param(struct pipe_ctx *pipe_ctx)
 {
+       struct resource_pool *pool = pipe_ctx->stream->ctx->dc->res_pool;
 
-       dcn20_build_pipe_pix_clk_params(pipe_ctx);
+       if (pool->funcs->build_pipe_pix_clk_params) {
+               pool->funcs->build_pipe_pix_clk_params(pipe_ctx);
+       } else {
+               dcn20_build_pipe_pix_clk_params(pipe_ctx);
+       }
 
        pipe_ctx->stream->clamping.pixel_encoding = pipe_ctx->stream->timing.pixel_encoding;