};
        };
 
-       intc: interrupt-controller@a01000 {
-               compatible = "arm,cortex-a9-gic";
-               #interrupt-cells = <3>;
-               interrupt-controller;
-               reg = <0x00a01000 0x1000>,
-                     <0x00a00100 0x100>;
-               interrupt-parent = <&intc>;
-       };
-
        ckil: clock-ckil {
                compatible = "fixed-clock";
                #clock-cells = <0>;
                        clocks = <&clks IMX6SX_CLK_OCRAM>;
                };
 
+               intc: interrupt-controller@a01000 {
+                       compatible = "arm,cortex-a9-gic";
+                       #interrupt-cells = <3>;
+                       interrupt-controller;
+                       reg = <0x00a01000 0x1000>,
+                             <0x00a00100 0x100>;
+                       interrupt-parent = <&intc>;
+               };
+
                L2: l2-cache@a02000 {
                        compatible = "arm,pl310-cache";
                        reg = <0x00a02000 0x1000>;