drm/amd/display: make dcn20 stream_gating use a pointer for dsc_pg_control

This allows us to reuse these on different asics.

Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
index ee56060943f1cd526062b6ca64dc6729304bf2e9..5720b6e5d321b24be47c209e06f9f8f1089fd0b8 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
@@ -1918,9 +1918,9 @@ void dcn20_disable_stream_gating(struct dc *dc, struct pipe_ctx *pipe_ctx)
        if (pipe_ctx->stream_res.dsc) {
                struct pipe_ctx *odm_pipe = pipe_ctx->next_odm_pipe;
 
-               dcn20_dsc_pg_control(hws, pipe_ctx->stream_res.dsc->inst, true);
+               hws->funcs.dsc_pg_control(hws, pipe_ctx->stream_res.dsc->inst, true);
                while (odm_pipe) {
-                       dcn20_dsc_pg_control(hws, odm_pipe->stream_res.dsc->inst, true);
+                       hws->funcs.dsc_pg_control(hws, odm_pipe->stream_res.dsc->inst, true);
                        odm_pipe = odm_pipe->next_odm_pipe;
                }
        }
@@ -1933,9 +1933,9 @@ void dcn20_enable_stream_gating(struct dc *dc, struct pipe_ctx *pipe_ctx)
        if (pipe_ctx->stream_res.dsc) {
                struct pipe_ctx *odm_pipe = pipe_ctx->next_odm_pipe;
 
-               dcn20_dsc_pg_control(hws, pipe_ctx->stream_res.dsc->inst, false);
+               hws->funcs.dsc_pg_control(hws, pipe_ctx->stream_res.dsc->inst, false);
                while (odm_pipe) {
-                       dcn20_dsc_pg_control(hws, odm_pipe->stream_res.dsc->inst, false);
+                       hws->funcs.dsc_pg_control(hws, odm_pipe->stream_res.dsc->inst, false);
                        odm_pipe = odm_pipe->next_odm_pipe;
                }
        }