drm/amd/display: Update static soc table

[WHY]
Update the static soc table dcn3_5_soc.

Reviewed-by: Alvin Lee <alvin.lee2@amd.com>
Signed-off-by: Charlene Liu <Charlene.Liu@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn35/dcn35_fpu.c b/drivers/gpu/drm/amd/display/dc/dml/dcn35/dcn35_fpu.c
index e8efffcc69a162f6d8548ee3fe0e251d2822bdfb..92f0a099d089ac1c0b82ee8427cebb03871f1182 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn35/dcn35_fpu.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn35/dcn35_fpu.c
@@ -159,7 +159,7 @@ struct _vcs_dpi_soc_bounding_box_st dcn3_5_soc = {
                        .dppclk_mhz = 1200.0,
                        .phyclk_mhz = 810.0,
                        .phyclk_d18_mhz = 667.0,
-                       .dscclk_mhz = 417.0,
+                       .dscclk_mhz = 400.0,
                        .dtbclk_mhz = 600.0,
                },
        },