/* Disable Rx and Tx */
        clrbits32(&ug_regs->maccfg1, MACCFG1_ENABLE_RX | MACCFG1_ENABLE_TX);
 
-       phy_disconnect(ugeth->phydev);
-       ugeth->phydev = NULL;
-
        ucc_geth_memclean(ugeth);
 }
 
 
        napi_disable(&ugeth->napi);
 
+       cancel_work_sync(&ugeth->timeout_work);
        ucc_geth_stop(ugeth);
+       phy_disconnect(ugeth->phydev);
+       ugeth->phydev = NULL;
 
        free_irq(ugeth->ug_info->uf_info.irq, ugeth->ndev);
 
                 * Must reset MAC *and* PHY. This is done by reopening
                 * the device.
                 */
-               ucc_geth_close(dev);
-               ucc_geth_open(dev);
+               netif_tx_stop_all_queues(dev);
+               ucc_geth_stop(ugeth);
+               ucc_geth_init_mac(ugeth);
+               /* Must start PHY here */
+               phy_start(ugeth->phydev);
+               netif_tx_start_all_queues(dev);
        }
 
        netif_tx_schedule_all(dev);
 {
        struct ucc_geth_private *ugeth = netdev_priv(dev);
 
-       netif_carrier_off(dev);
        schedule_work(&ugeth->timeout_work);
 }