size = iommu->geometry.aperture_end - start + 1;
 
        aspace = msm_gem_address_space_create(mmu, "gpu",
-               start & GENMASK(48, 0), size);
+               start & GENMASK_ULL(48, 0), size);
 
        if (IS_ERR(aspace) && !IS_ERR(mmu))
                mmu->funcs->destroy(mmu);
 
        pll->max_rate = 3500000000UL;
        if (pll->type == MSM_DSI_PHY_7NM_V4_1) {
                pll->min_rate = 600000000UL;
-               pll->max_rate = 5000000000UL;
+               pll->max_rate = (unsigned long)5000000000ULL;
                /* workaround for max rate overflowing on 32-bit builds: */
                pll->max_rate = max(pll->max_rate, 0xffffffffUL);
        }