ARM: dts: keystone: Fix control register range for clktsip

The control register range for clktsio interferes with clkaemifspi clock.
And it causes issues for NAND/AEMIF. So fix it.

Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>

diff --git a/arch/arm/boot/dts/k2hk-clocks.dtsi b/arch/arm/boot/dts/k2hk-clocks.dtsi
index f8e5729bd858ad2e4b7aacb6d9d10f64bba704a1..96e65365afe302c10b63ef08157e9cee590645ba 100644 (file)
--- a/arch/arm/boot/dts/k2hk-clocks.dtsi
+++ b/arch/arm/boot/dts/k2hk-clocks.dtsi
@@ -59,7 +59,7 @@ clocks {
                compatible = "ti,keystone,psc-clock";
                clocks = <&chipclk16>;
                clock-output-names = "tsip";
-               reg = <0x0235000c 0xb00>, <0x02350000 0x400>;
+               reg = <0x02350000 0xb00>, <0x02350000 0x400>;
                reg-names = "control", "domain";
                domain-id = <0>;
        };