Simply add power management controller nodes and sleep properties.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Acked-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
                reg = <0xe0000000 0x00000200>;
                bus-frequency = <0>;    /* Filled in by U-Boot */
 
+               pmc: power@b00 {
+                       compatible = "fsl,mpc8360-pmc", "fsl,mpc8349-pmc";
+                       reg = <0xb00 0x100 0xa00 0x100>;
+                       interrupts = <80 0x8>;
+                       interrupt-parent = <&ipic>;
+               };
+
                i2c@3000 {
                        #address-cells = <1>;
                        #size-cells = <0>;
 
                        reg = <0x200 0x100>;
                };
 
+               pmc: power@b00 {
+                       compatible = "fsl,mpc8323-pmc", "fsl,mpc8349-pmc";
+                       reg = <0xb00 0x100 0xa00 0x100>;
+                       interrupts = <80 0x8>;
+                       interrupt-parent = <&ipic>;
+               };
+
                i2c@3000 {
                        #address-cells = <1>;
                        #size-cells = <0>;
                        fsl,channel-fifo-len = <24>;
                        fsl,exec-units-mask = <0x4c>;
                        fsl,descriptor-types-mask = <0x0122003f>;
+                       sleep = <&pmc 0x03000000>;
                };
 
                ipic: pic@700 {
                       0xe0008300 0x8>;         /* config space access registers */
                compatible = "fsl,mpc8349-pci";
                device_type = "pci";
+               sleep = <&pmc 0x00010000>;
        };
 };
 
                        reg = <0x200 0x100>;
                };
 
+               pmc: power@b00 {
+                       compatible = "fsl,mpc8323-pmc", "fsl,mpc8349-pmc";
+                       reg = <0xb00 0x100 0xa00 0x100>;
+                       interrupts = <80 0x8>;
+                       interrupt-parent = <&ipic>;
+               };
+
                i2c@3000 {
                        #address-cells = <1>;
                        #size-cells = <0>;
                        fsl,channel-fifo-len = <24>;
                        fsl,exec-units-mask = <0x4c>;
                        fsl,descriptor-types-mask = <0x0122003f>;
+                       sleep = <&pmc 0x03000000>;
                };
 
                ipic:pic@700 {
                       0xe0008300 0x8>;         /* config space access registers */
                compatible = "fsl,mpc8349-pci";
                device_type = "pci";
+               sleep = <&pmc 0x00010000>;
        };
 };
 
                        reg = <0x200 0x100>;
                };
 
+               pmc: power@b00 {
+                       compatible = "fsl,mpc8360-pmc", "fsl,mpc8349-pmc";
+                       reg = <0xb00 0x100 0xa00 0x100>;
+                       interrupts = <80 0x8>;
+                       interrupt-parent = <&ipic>;
+               };
+
                i2c@3000 {
                        #address-cells = <1>;
                        #size-cells = <0>;
                        fsl,channel-fifo-len = <24>;
                        fsl,exec-units-mask = <0x7e>;
                        fsl,descriptor-types-mask = <0x01010ebf>;
+                       sleep = <&pmc 0x03000000>;
                };
 
                ipic: pic@700 {
                       0xe0008300 0x8>;         /* config space access registers */
                compatible = "fsl,mpc8349-pci";
                device_type = "pci";
+               sleep = <&pmc 0x00010000>;
        };
 };
 
                        reg = <0x200 0x100>;
                };
 
+               pmc: power@b00 {
+                       compatible = "fsl,mpc8360-pmc", "fsl,mpc8349-pmc";
+                       reg = <0xb00 0x100 0xa00 0x100>;
+                       interrupts = <80 0x8>;
+                       interrupt-parent = <&ipic>;
+               };
+
                i2c@3000 {
                        #address-cells = <1>;
                        #size-cells = <0>;
                        fsl,channel-fifo-len = <24>;
                        fsl,exec-units-mask = <0x7e>;
                        fsl,descriptor-types-mask = <0x01010ebf>;
+                       sleep = <&pmc 0x03000000>;
                };
 
                ipic: interrupt-controller@700 {
                                 0xa800 0 0 2 &ipic 20 8
                                 0xa800 0 0 3 &ipic 21 8
                                 0xa800 0 0 4 &ipic 18 8>;
+               sleep = <&pmc 0x00010000>;
                /* filled by u-boot */
                bus-range = <0 0>;
                clock-frequency = <0>;