bool is_dual_link;
        u32 reg;
+       u32 a3_power;
 
        struct intel_lvds_connector *attached_connector;
 };
 
        /* It would be nice to set 24 vs 18-bit mode (LVDS_A3_POWER_UP)
         * appropriately here, but we need to look more thoroughly into how
-        * panels behave in the two modes.
+        * panels behave in the two modes. For now, let's just maintain the
+        * value we got from the BIOS.
         */
+        temp &= ~LVDS_A3_POWER_MASK;
+        temp |= lvds_encoder->a3_power;
 
        /* Set the dithering flag on LVDS as needed, note that there is no
         * special lvds dither control bit on pch-split platforms, dithering is
                                      struct intel_crtc_config *pipe_config)
 {
        struct drm_device *dev = intel_encoder->base.dev;
-       struct drm_i915_private *dev_priv = dev->dev_private;
        struct intel_lvds_encoder *lvds_encoder =
                to_lvds_encoder(&intel_encoder->base);
        struct intel_connector *intel_connector =
                return false;
        }
 
-       if ((I915_READ(lvds_encoder->reg) & LVDS_A3_POWER_MASK) ==
-           LVDS_A3_POWER_UP)
+       if (lvds_encoder->a3_power == LVDS_A3_POWER_UP)
                lvds_bpp = 8*3;
        else
                lvds_bpp = 6*3;
        DRM_DEBUG_KMS("detected %s-link lvds configuration\n",
                      lvds_encoder->is_dual_link ? "dual" : "single");
 
+       lvds_encoder->a3_power = I915_READ(lvds_encoder->reg) &
+                                LVDS_A3_POWER_MASK;
+
        /*
         * Unlock registers and just
         * leave them unlocked