]> www.infradead.org Git - users/hch/block.git/commitdiff
next-20201029/drm-misc
authorStephen Rothwell <sfr@canb.auug.org.au>
Fri, 30 Oct 2020 00:04:47 +0000 (11:04 +1100)
committerStephen Rothwell <sfr@canb.auug.org.au>
Fri, 30 Oct 2020 00:04:48 +0000 (11:04 +1100)
61 files changed:
1  2 
Documentation/devicetree/bindings/vendor-prefixes.yaml
Documentation/driver-api/dma-buf.rst
MAINTAINERS
drivers/dma-buf/dma-buf.c
drivers/dma-buf/heaps/heap-helpers.c
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c
drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c
drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c
drivers/gpu/drm/armada/armada_gem.c
drivers/gpu/drm/drm_dp_mst_topology.c
drivers/gpu/drm/drm_fb_helper.c
drivers/gpu/drm/drm_gem.c
drivers/gpu/drm/drm_gem_cma_helper.c
drivers/gpu/drm/drm_gem_shmem_helper.c
drivers/gpu/drm/drm_prime.c
drivers/gpu/drm/etnaviv/etnaviv_gem.c
drivers/gpu/drm/exynos/exynos_drm_gem.c
drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c
drivers/gpu/drm/i915/gem/selftests/mock_dmabuf.c
drivers/gpu/drm/i915/i915_drv.c
drivers/gpu/drm/i915/selftests/mock_gem_device.c
drivers/gpu/drm/mediatek/mtk_drm_crtc.c
drivers/gpu/drm/mediatek/mtk_drm_drv.c
drivers/gpu/drm/mediatek/mtk_drm_gem.c
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
drivers/gpu/drm/msm/msm_drv.c
drivers/gpu/drm/msm/msm_drv.h
drivers/gpu/drm/msm/msm_gem.c
drivers/gpu/drm/nouveau/nouveau_mem.c
drivers/gpu/drm/omapdrm/omap_gem.c
drivers/gpu/drm/radeon/radeon.h
drivers/gpu/drm/radeon/radeon_display.c
drivers/gpu/drm/rockchip/rockchip_drm_gem.c
drivers/gpu/drm/tegra/gem.c
drivers/gpu/drm/ttm/ttm_bo.c
drivers/gpu/drm/vc4/vc4_crtc.c
drivers/gpu/drm/vc4/vc4_drv.c
drivers/gpu/drm/vc4/vc4_drv.h
drivers/gpu/drm/virtio/virtgpu_object.c
drivers/gpu/drm/virtio/virtgpu_vq.c
drivers/gpu/drm/vmwgfx/vmwgfx_gmrid_manager.c
drivers/gpu/drm/vmwgfx/vmwgfx_thp.c
drivers/gpu/drm/vmwgfx/vmwgfx_ttm_buffer.c
drivers/gpu/drm/xen/xen_drm_front_gem.c
drivers/media/common/videobuf2/videobuf2-dma-contig.c
drivers/media/common/videobuf2/videobuf2-dma-sg.c
drivers/media/common/videobuf2/videobuf2-vmalloc.c
drivers/misc/fastrpc.c
drivers/video/console/sticore.c
include/drm/drm_dp_helper.h
include/drm/drm_prime.h
include/linux/font.h

Simple merge
diff --cc MAINTAINERS
Simple merge
Simple merge
Simple merge
index 127a76c65684c380b67d3f89ebf73f697e297cf2,1aa516429c80a7d7598507a6966dd459c8e70078..06dfe9b1c7e65272e2381706c313a1938782005d
@@@ -1534,77 -1506,3 +1507,77 @@@ uint32_t amdgpu_bo_get_preferred_pin_do
        }
        return domain;
  }
-       pin_count = READ_ONCE(bo->pin_count);
 +
 +#if defined(CONFIG_DEBUG_FS)
 +#define amdgpu_bo_print_flag(m, bo, flag)                     \
 +      do {                                                    \
 +              if (bo->flags & (AMDGPU_GEM_CREATE_ ## flag)) { \
 +                      seq_printf((m), " " #flag);             \
 +              }                                               \
 +      } while (0)
 +
 +/**
 + * amdgpu_debugfs_print_bo_info - print BO info in debugfs file
 + *
 + * @id: Index or Id of the BO
 + * @bo: Requested BO for printing info
 + * @m: debugfs file
 + *
 + * Print BO information in debugfs file
 + *
 + * Returns:
 + * Size of the BO in bytes.
 + */
 +u64 amdgpu_bo_print_info(int id, struct amdgpu_bo *bo, struct seq_file *m)
 +{
 +      struct dma_buf_attachment *attachment;
 +      struct dma_buf *dma_buf;
 +      unsigned int domain;
 +      const char *placement;
 +      unsigned int pin_count;
 +      u64 size;
 +
 +      domain = amdgpu_mem_type_to_domain(bo->tbo.mem.mem_type);
 +      switch (domain) {
 +      case AMDGPU_GEM_DOMAIN_VRAM:
 +              placement = "VRAM";
 +              break;
 +      case AMDGPU_GEM_DOMAIN_GTT:
 +              placement = " GTT";
 +              break;
 +      case AMDGPU_GEM_DOMAIN_CPU:
 +      default:
 +              placement = " CPU";
 +              break;
 +      }
 +
 +      size = amdgpu_bo_size(bo);
 +      seq_printf(m, "\t\t0x%08x: %12lld byte %s",
 +                      id, size, placement);
 +
++      pin_count = READ_ONCE(bo->tbo.pin_count);
 +      if (pin_count)
 +              seq_printf(m, " pin count %d", pin_count);
 +
 +      dma_buf = READ_ONCE(bo->tbo.base.dma_buf);
 +      attachment = READ_ONCE(bo->tbo.base.import_attach);
 +
 +      if (attachment)
 +              seq_printf(m, " imported from %p", dma_buf);
 +      else if (dma_buf)
 +              seq_printf(m, " exported as %p", dma_buf);
 +
 +      amdgpu_bo_print_flag(m, bo, CPU_ACCESS_REQUIRED);
 +      amdgpu_bo_print_flag(m, bo, NO_CPU_ACCESS);
 +      amdgpu_bo_print_flag(m, bo, CPU_GTT_USWC);
 +      amdgpu_bo_print_flag(m, bo, VRAM_CLEARED);
 +      amdgpu_bo_print_flag(m, bo, SHADOW);
 +      amdgpu_bo_print_flag(m, bo, VRAM_CONTIGUOUS);
 +      amdgpu_bo_print_flag(m, bo, VM_ALWAYS_VALID);
 +      amdgpu_bo_print_flag(m, bo, EXPLICIT_SYNC);
 +
 +      seq_puts(m, "\n");
 +
 +      return size;
 +}
 +#endif
Simple merge
Simple merge
Simple merge
index 69c2c079d8036bcde1d17b717c50ea5168cea2a1,1da67d34e55d6327399079135ec3316d1e17cfed..d586068f55091242c081650fd86679e70f26fac5
@@@ -1085,9 -1076,7 +1076,9 @@@ int drm_gem_mmap_obj(struct drm_gem_obj
         */
        drm_gem_object_get(obj);
  
-       if (obj->funcs && obj->funcs->mmap) {
 +      vma->vm_private_data = obj;
 +
+       if (obj->funcs->mmap) {
                ret = obj->funcs->mmap(obj, vma);
                if (ret) {
                        drm_gem_object_put(obj);
Simple merge
index 9f955f2010c25770f53110a2ff92ba98d0caadf4,4910c446db836a7036aabf68c9a1c15beba9427f..187b55ede62ec4a1b665e351aa45863a98652752
@@@ -622,17 -619,18 +620,19 @@@ struct sg_table *drm_gem_map_dma_buf(st
        if (WARN_ON(dir == DMA_NONE))
                return ERR_PTR(-EINVAL);
  
-       if (obj->funcs)
-               sgt = obj->funcs->get_sg_table(obj);
-       else
-               sgt = obj->dev->driver->gem_prime_get_sg_table(obj);
+       if (WARN_ON(!obj->funcs->get_sg_table))
+               return ERR_PTR(-ENOSYS);
+       sgt = obj->funcs->get_sg_table(obj);
+       if (IS_ERR(sgt))
+               return sgt;
  
 -      if (!dma_map_sg_attrs(attach->dev, sgt->sgl, sgt->nents, dir,
 -                            DMA_ATTR_SKIP_CPU_SYNC)) {
 +      ret = dma_map_sgtable(attach->dev, sgt, dir,
 +                            DMA_ATTR_SKIP_CPU_SYNC);
 +      if (ret) {
                sg_free_table(sgt);
                kfree(sgt);
 -              sgt = ERR_PTR(-ENOMEM);
 +              sgt = ERR_PTR(ret);
        }
  
        return sgt;
Simple merge
Simple merge
index f56414a06ec416c74cdcfccfa34e817bf1def64f,5ba9b49dfa7a55956e37954a5fe6d2a20d509690..6a24ce245a373606c9ab5b78b220c43924e6f3f1
@@@ -706,10 -753,12 +707,12 @@@ static struct drm_crtc_state *dpu_crtc_
  }
  
  static void dpu_crtc_disable(struct drm_crtc *crtc,
-                            struct drm_crtc_state *old_crtc_state)
+                            struct drm_atomic_state *state)
  {
 -      struct dpu_crtc *dpu_crtc;
 -      struct dpu_crtc_state *cstate;
+       struct drm_crtc_state *old_crtc_state = drm_atomic_get_old_crtc_state(state,
+                                                                             crtc);
 +      struct dpu_crtc *dpu_crtc = to_dpu_crtc(crtc);
 +      struct dpu_crtc_state *cstate = to_dpu_crtc_state(crtc->state);
        struct drm_encoder *encoder;
        unsigned long flags;
        bool release_bandwidth = false;
  }
  
  static void dpu_crtc_enable(struct drm_crtc *crtc,
-               struct drm_crtc_state *old_crtc_state)
+               struct drm_atomic_state *state)
  {
 -      struct dpu_crtc *dpu_crtc;
 +      struct dpu_crtc *dpu_crtc = to_dpu_crtc(crtc);
        struct drm_encoder *encoder;
        bool request_bandwidth = false;
  
Simple merge
Simple merge
Simple merge
Simple merge
Simple merge
Simple merge
Simple merge
Simple merge
Simple merge
Simple merge
Simple merge
index 07945ca238e2d93741a7df8db1c21c56f56e7f74,c1824f5369367e9add5afeaf5f8359b0e9ddec01..72586cd8cc4c71f7b3b4061ac7151d739cf7d8bd
@@@ -1024,11 -1027,14 +1026,13 @@@ void virtio_gpu_cmd_transfer_to_host_3d
        struct virtio_gpu_transfer_host_3d *cmd_p;
        struct virtio_gpu_vbuffer *vbuf;
        bool use_dma_api = !virtio_has_dma_quirk(vgdev->vdev);
-       struct virtio_gpu_object_shmem *shmem = to_virtio_gpu_shmem(bo);
  
-       if (use_dma_api)
+       if (virtio_gpu_is_shmem(bo) && use_dma_api) {
+               struct virtio_gpu_object_shmem *shmem = to_virtio_gpu_shmem(bo);
 -              dma_sync_sg_for_device(vgdev->vdev->dev.parent,
 -                                     shmem->pages->sgl, shmem->pages->nents,
 -                                     DMA_TO_DEVICE);
 +              dma_sync_sgtable_for_device(vgdev->vdev->dev.parent,
 +                                          shmem->pages, DMA_TO_DEVICE);
+       }
  
        cmd_p = virtio_gpu_alloc_cmd(vgdev, &vbuf, sizeof(*cmd_p));
        memset(cmd_p, 0, sizeof(*cmd_p));
Simple merge
Simple merge
Simple merge
index 54df0431d1e6dbdc751adbf0947951ec422c20de,ae4e20245ba393d4032092f1d93ded827004ce9d..6b40258927bf588d8005bb4c39f1a50526d1b21b
@@@ -1003,16 -1035,7 +1054,17 @@@ struct drm_device
  #define DP_CEC_TX_MESSAGE_BUFFER               0x3020
  #define DP_CEC_MESSAGE_BUFFER_LENGTH             0x10
  
 +#define DP_PROTOCOL_CONVERTER_CONTROL_0               0x3050 /* DP 1.3 */
 +# define DP_HDMI_DVI_OUTPUT_CONFIG            (1 << 0) /* DP 1.3 */
 +#define DP_PROTOCOL_CONVERTER_CONTROL_1               0x3051 /* DP 1.3 */
 +# define DP_CONVERSION_TO_YCBCR420_ENABLE     (1 << 0) /* DP 1.3 */
 +# define DP_HDMI_EDID_PROCESSING_DISABLE      (1 << 1) /* DP 1.4 */
 +# define DP_HDMI_AUTONOMOUS_SCRAMBLING_DISABLE        (1 << 2) /* DP 1.4 */
 +# define DP_HDMI_FORCE_SCRAMBLING             (1 << 3) /* DP 1.4 */
 +#define DP_PROTOCOL_CONVERTER_CONTROL_2               0x3052 /* DP 1.3 */
 +# define DP_CONVERSION_TO_YCBCR422_ENABLE     (1 << 0) /* DP 1.3 */
 +
+ /* HDCP 1.3 and HDCP 2.2 */
  #define DP_AUX_HDCP_BKSV              0x68000
  #define DP_AUX_HDCP_RI_PRIME          0x68005
  #define DP_AUX_HDCP_AKSV              0x68007
Simple merge
Simple merge