]> www.infradead.org Git - users/dwmw2/linux.git/commitdiff
drm/msm/a6xx: Ensure CX collapse during gpu recovery
authorAkhil P Oommen <quic_akhilpo@quicinc.com>
Thu, 18 Aug 2022 20:22:13 +0000 (01:52 +0530)
committerRob Clark <robdclark@chromium.org>
Sun, 28 Aug 2022 16:29:27 +0000 (09:29 -0700)
Because there could be transient votes from other drivers/tz/hyp which
may keep the cx gdsc enabled, we should poll until cx gdsc collapses.
We can use the reset framework to poll for cx gdsc collapse from gpucc
clk driver.

This feature requires support from the platform's gpucc driver.

Signed-off-by: Akhil P Oommen <quic_akhilpo@quicinc.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Patchwork: https://patchwork.freedesktop.org/patch/498397/
Link: https://lore.kernel.org/r/20220819015030.v5.5.I176567525af2b9439a7e485d0ca130528666a55c@changeid
Signed-off-by: Rob Clark <robdclark@chromium.org>
drivers/gpu/drm/msm/adreno/a6xx_gpu.c
drivers/gpu/drm/msm/msm_gpu.c
drivers/gpu/drm/msm/msm_gpu.h

index aa2ec986136142b52a27bf2fbc0775f81b2bf9fb..2ea5fb332df5806eb72406774d4f0e382a17a11c 100644 (file)
@@ -10,6 +10,7 @@
 
 #include <linux/bitfield.h>
 #include <linux/devfreq.h>
+#include <linux/reset.h>
 #include <linux/soc/qcom/llcc-qcom.h>
 
 #define GPU_PAS_ID 13
@@ -1297,6 +1298,9 @@ static void a6xx_recover(struct msm_gpu *gpu)
        /* And the final one from recover worker */
        pm_runtime_put_sync(&gpu->pdev->dev);
 
+       /* Call into gpucc driver to poll for cx gdsc collapse */
+       reset_control_reset(gpu->cx_collapse);
+
        pm_runtime_use_autosuspend(&gpu->pdev->dev);
 
        if (active_submits)
index 9ec9a99ffe77a9cd954522f9fed7ee02b0e46b25..0098ee8438aae7b5d1c90714135f783d9361ff80 100644 (file)
@@ -16,6 +16,7 @@
 #include <generated/utsrelease.h>
 #include <linux/string_helpers.h>
 #include <linux/devcoredump.h>
+#include <linux/reset.h>
 #include <linux/sched/task.h>
 
 /*
@@ -903,6 +904,9 @@ int msm_gpu_init(struct drm_device *drm, struct platform_device *pdev,
        if (IS_ERR(gpu->gpu_cx))
                gpu->gpu_cx = NULL;
 
+       gpu->cx_collapse = devm_reset_control_get_optional_exclusive(&pdev->dev,
+                       "cx_collapse");
+
        gpu->pdev = pdev;
        platform_set_drvdata(pdev, &gpu->adreno_smmu);
 
index a0885ff99e5bf55f8eec27fae70a9270893ade6b..ff911e7305ce98f4364af30b73add5a11f42ee6d 100644 (file)
@@ -13,6 +13,7 @@
 #include <linux/interconnect.h>
 #include <linux/pm_opp.h>
 #include <linux/regulator/consumer.h>
+#include <linux/reset.h>
 
 #include "msm_drv.h"
 #include "msm_fence.h"
@@ -271,6 +272,9 @@ struct msm_gpu {
        bool hw_apriv;
 
        struct thermal_cooling_device *cooling;
+
+       /* To poll for cx gdsc collapse during gpu recovery */
+       struct reset_control *cx_collapse;
 };
 
 static inline struct msm_gpu *dev_to_gpu(struct device *dev)