PCI_SLOT(pe->rid), PCI_FUNC(pe->rid));
 #endif /* CONFIG_PCI_IOV*/
 
-       printk("%spci %s: [PE# %.3d] %pV",
+       printk("%spci %s: [PE# %.2x] %pV",
               level, pfix, pe->pe_number, &vaf);
 
        va_end(args);
        rc = opal_pci_eeh_freeze_clear(phb->opal_id, pe_no,
                                       OPAL_EEH_ACTION_CLEAR_FREEZE_ALL);
        if (rc != OPAL_SUCCESS && rc != OPAL_UNSUPPORTED)
-               pr_warn("%s: Error %lld unfreezing PHB#%d-PE#%d\n",
+               pr_warn("%s: Error %lld unfreezing PHB#%x-PE#%x\n",
                        __func__, rc, phb->hose->global_number, pe_no);
 
        return &phb->ioda.pe_array[pe_no];
 static void pnv_ioda_reserve_pe(struct pnv_phb *phb, int pe_no)
 {
        if (!(pe_no >= 0 && pe_no < phb->ioda.total_pe_num)) {
-               pr_warn("%s: Invalid PE %d on PHB#%x\n",
+               pr_warn("%s: Invalid PE %x on PHB#%x\n",
                        __func__, pe_no, phb->hose->global_number);
                return;
        }
 
        if (test_and_set_bit(pe_no, phb->ioda.pe_alloc))
-               pr_debug("%s: PE %d was reserved on PHB#%x\n",
+               pr_debug("%s: PE %x was reserved on PHB#%x\n",
                         __func__, pe_no, phb->hose->global_number);
 
        pnv_ioda_init_pe(phb, pe_no);
        else if (phb->ioda.reserved_pe_idx == (phb->ioda.total_pe_num - 1))
                r->end -= (2 * phb->ioda.m64_segsize);
        else
-               pr_warn("  Cannot strip M64 segment for reserved PE#%d\n",
+               pr_warn("  Cannot strip M64 segment for reserved PE#%x\n",
                        phb->ioda.reserved_pe_idx);
 
        return 0;
                                OPAL_M64_WINDOW_TYPE, index, base, 0,
                                PNV_IODA1_M64_SEGS * segsz);
                if (rc != OPAL_SUCCESS) {
-                       pr_warn("  Error %lld setting M64 PHB#%d-BAR#%d\n",
+                       pr_warn("  Error %lld setting M64 PHB#%x-BAR#%d\n",
                                rc, phb->hose->global_number, index);
                        goto fail;
                }
                                OPAL_M64_WINDOW_TYPE, index,
                                OPAL_ENABLE_M64_SPLIT);
                if (rc != OPAL_SUCCESS) {
-                       pr_warn("  Error %lld enabling M64 PHB#%d-BAR#%d\n",
+                       pr_warn("  Error %lld enabling M64 PHB#%x-BAR#%d\n",
                                rc, phb->hose->global_number, index);
                        goto fail;
                }
        else if (phb->ioda.reserved_pe_idx == (phb->ioda.total_pe_num - 1))
                r->end -= (2 * phb->ioda.m64_segsize);
        else
-               WARN(1, "Wrong reserved PE#%d on PHB#%d\n",
+               WARN(1, "Wrong reserved PE#%x on PHB#%x\n",
                     phb->ioda.reserved_pe_idx, phb->hose->global_number);
 
        return 0;
                                        pe->pe_number / PNV_IODA1_M64_SEGS,
                                        pe->pe_number % PNV_IODA1_M64_SEGS);
                        if (rc != OPAL_SUCCESS)
-                               pr_warn("%s: Error %lld mapping M64 for PHB#%d-PE#%d\n",
+                               pr_warn("%s: Error %lld mapping M64 for PHB#%x-PE#%x\n",
                                        __func__, rc, phb->hose->global_number,
                                        pe->pe_number);
                }
        pe->mve_number = pe->pe_number;
        rc = opal_pci_set_mve(phb->opal_id, pe->mve_number, pe->pe_number);
        if (rc != OPAL_SUCCESS) {
-               pe_err(pe, "OPAL error %ld setting up MVE %d\n",
+               pe_err(pe, "OPAL error %ld setting up MVE %x\n",
                       rc, pe->mve_number);
                pe->mve_number = -1;
        } else {
                rc = opal_pci_set_mve_enable(phb->opal_id,
                                             pe->mve_number, OPAL_ENABLE_MVE);
                if (rc) {
-                       pe_err(pe, "OPAL error %ld enabling MVE %d\n",
+                       pe_err(pe, "OPAL error %ld enabling MVE %x\n",
                               rc, pe->mve_number);
                        pe->mve_number = -1;
                }
        pe->rid = bus->busn_res.start << 8;
 
        if (all)
-               pe_info(pe, "Secondary bus %d..%d associated with PE#%d\n",
+               pe_info(pe, "Secondary bus %d..%d associated with PE#%x\n",
                        bus->busn_res.start, bus->busn_res.end, pe->pe_number);
        else
-               pe_info(pe, "Secondary bus %d associated with PE#%d\n",
+               pe_info(pe, "Secondary bus %d associated with PE#%x\n",
                        bus->busn_res.start, pe->pe_number);
 
        if (pnv_ioda_configure_pe(phb, pe)) {
                         * peer NPU.
                         */
                        dev_info(&npu_pdev->dev,
-                               "Associating to existing PE %d\n", pe_num);
+                               "Associating to existing PE %x\n", pe_num);
                        pci_dev_get(npu_pdev);
                        npu_pdn = pci_get_pdn(npu_pdev);
                        rid = npu_pdev->bus->number << 8 | npu_pdn->devfn;
                pe->rid = (pci_iov_virtfn_bus(pdev, vf_index) << 8) |
                           pci_iov_virtfn_devfn(pdev, vf_index);
 
-               pe_info(pe, "VF %04d:%02d:%02d.%d associated with PE#%d\n",
+               pe_info(pe, "VF %04d:%02d:%02d.%d associated with PE#%x\n",
                        hose->global_number, pdev->bus->number,
                        PCI_SLOT(pci_iov_virtfn_devfn(pdev, vf_index)),
                        PCI_FUNC(pci_iov_virtfn_devfn(pdev, vf_index)), pe_num);
        pnv_set_msi_irq_chip(phb, virq);
 
        pr_devel("%s: %s-bit MSI on hwirq %x (xive #%d),"
-                " address=%x_%08x data=%x PE# %d\n",
+                " address=%x_%08x data=%x PE# %x\n",
                 pci_name(dev), is_64 ? "64" : "32", hwirq, xive_num,
                 msg->address_hi, msg->address_lo, data, pe->pe_number);
 
                        rc = opal_pci_map_pe_mmio_window(phb->opal_id,
                                pe->pe_number, OPAL_IO_WINDOW_TYPE, 0, index);
                        if (rc != OPAL_SUCCESS) {
-                               pr_err("%s: Error %lld mapping IO segment#%d to PE#%d\n",
+                               pr_err("%s: Error %lld mapping IO segment#%d to PE#%x\n",
                                       __func__, rc, index, pe->pe_number);
                                break;
                        }
                        rc = opal_pci_map_pe_mmio_window(phb->opal_id,
                                pe->pe_number, OPAL_M32_WINDOW_TYPE, 0, index);
                        if (rc != OPAL_SUCCESS) {
-                               pr_err("%s: Error %lld mapping M32 segment#%d to PE#%d",
+                               pr_err("%s: Error %lld mapping M32 segment#%d to PE#%x",
                                       __func__, rc, index, pe->pe_number);
                                break;
                        }
                pnv_pci_ioda2_setup_dma_pe(phb, pe);
                break;
        default:
-               pr_warn("%s: No DMA for PHB#%d (type %d)\n",
+               pr_warn("%s: No DMA for PHB#%x (type %d)\n",
                        __func__, phb->hose->global_number, phb->type);
        }
 }