drm/msm/mdp5: Always generate active-high sync signals for DSI

DSI video mode engine can only take active-high sync signals. This
change prevents MDP5 sending active-low sync signals to DSI in any
case.

Signed-off-by: Hai Li <hali@codeaurora.org>
Tested-by: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>

diff --git a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_encoder.c b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_encoder.c
index 84d0a7b929186e8f842a9f5b433bd192d6a3231e..de97c08f3f1fba04950749215e58f9f5a4dfe8f5 100644 (file)
--- a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_encoder.c
+++ b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_encoder.c
@@ -144,10 +144,14 @@ static void mdp5_encoder_mode_set(struct drm_encoder *encoder,
                        mode->type, mode->flags);
 
        ctrl_pol = 0;
-       if (mode->flags & DRM_MODE_FLAG_NHSYNC)
-               ctrl_pol |= MDP5_INTF_POLARITY_CTL_HSYNC_LOW;
-       if (mode->flags & DRM_MODE_FLAG_NVSYNC)
-               ctrl_pol |= MDP5_INTF_POLARITY_CTL_VSYNC_LOW;
+
+       /* DSI controller cannot handle active-low sync signals. */
+       if (mdp5_encoder->intf.type != INTF_DSI) {
+               if (mode->flags & DRM_MODE_FLAG_NHSYNC)
+                       ctrl_pol |= MDP5_INTF_POLARITY_CTL_HSYNC_LOW;
+               if (mode->flags & DRM_MODE_FLAG_NVSYNC)
+                       ctrl_pol |= MDP5_INTF_POLARITY_CTL_VSYNC_LOW;
+       }
        /* probably need to get DATA_EN polarity from panel.. */
 
        dtv_hsync_skew = 0;  /* get this from panel? */