arm64: dts: qcom: sm8550-mtp: Add PCIe PHYs and controllers nodes

Enable PCIe controllers and PHYs nodes on SM8550 MTP board.

Co-developed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230118230526.1499328-3-abel.vesa@linaro.org

diff --git a/arch/arm64/boot/dts/qcom/sm8550-mtp.dts b/arch/arm64/boot/dts/qcom/sm8550-mtp.dts
index e756f83a941c381d70478a625d4a70d62d91e9dc..6176c584afc836241a639578cb7994950219242e 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sm8550-mtp.dts
+++ b/arch/arm64/boot/dts/qcom/sm8550-mtp.dts
@@ -407,6 +407,35 @@
        status = "okay";
 };
 
+&pcie_1_phy_aux_clk {
+       clock-frequency = <1000>;
+};
+
+&pcie0 {
+       wake-gpios = <&tlmm 96 GPIO_ACTIVE_HIGH>;
+       perst-gpios = <&tlmm 94 GPIO_ACTIVE_LOW>;
+       status = "okay";
+};
+
+&pcie0_phy {
+       vdda-phy-supply = <&vreg_l1e_0p88>;
+       vdda-pll-supply = <&vreg_l3e_1p2>;
+       status = "okay";
+};
+
+&pcie1 {
+       wake-gpios = <&tlmm 99 GPIO_ACTIVE_HIGH>;
+       perst-gpios = <&tlmm 97 GPIO_ACTIVE_LOW>;
+       status = "okay";
+};
+
+&pcie1_phy {
+       vdda-phy-supply = <&vreg_l3c_0p91>;
+       vdda-pll-supply = <&vreg_l3e_1p2>;
+       vdda-qref-supply = <&vreg_l1e_0p88>;
+       status = "okay";
+};
+
 &pm8550_gpios {
        sdc2_card_det_n: sdc2-card-det-state {
                pins = "gpio12";