arm64: dts: apple: t7000: Add CPU caches

Add information about CPU caches in Apple A8 SoC.

Signed-off-by: Nick Chan <towinchenmi@gmail.com>
Link: https://lore.kernel.org/r/20250220-caches-v1-2-2c7011097768@gmail.com
Signed-off-by: Sven Peter <sven@svenpeter.dev>

diff --git a/arch/arm64/boot/dts/apple/t7000.dtsi b/arch/arm64/boot/dts/apple/t7000.dtsi
index 85a34dc7bc01088167d33d7b7e1cdb78161c46d8..52edc8d776a936ca5ba58537d4d68e153023f536 100644 (file)
--- a/arch/arm64/boot/dts/apple/t7000.dtsi
+++ b/arch/arm64/boot/dts/apple/t7000.dtsi
@@ -37,6 +37,9 @@
                        operating-points-v2 = <&typhoon_opp>;
                        enable-method = "spin-table";
                        device_type = "cpu";
+                       next-level-cache = <&l2_cache>;
+                       i-cache-size = <0x10000>;
+                       d-cache-size = <0x10000>;
                };
 
                cpu1: cpu@1 {
@@ -47,6 +50,16 @@
                        operating-points-v2 = <&typhoon_opp>;
                        enable-method = "spin-table";
                        device_type = "cpu";
+                       next-level-cache = <&l2_cache>;
+                       i-cache-size = <0x10000>;
+                       d-cache-size = <0x10000>;
+               };
+
+               l2_cache: l2-cache {
+                       compatible = "cache";
+                       cache-level = <2>;
+                       cache-unified;
+                       cache-size = <0x100000>;
                };
        };