ixgbe: add WOL support for X540

Add support for WOL as determined by the EEPROM.

(cherry picked from commit c23f5b6bbb5ba73cafdb354dcace17426fef4d38)
Signed-off-by: Emil Tantilov <emil.s.tantilov@intel.com>
Tested-by: Phil Schmitt <phillip.j.schmitt@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Signed-off-by: Joe Jin <joe.jin@oracle.com>

diff --git a/drivers/net/ixgbe/ixgbe.h b/drivers/net/ixgbe/ixgbe.h
index b43b2cde49d2815c4e7bcaa4fde384efd84ddedc..1f4a4caeb00e11111a9d211b4d3356fdce9b1575 100644 (file)
--- a/drivers/net/ixgbe/ixgbe.h
+++ b/drivers/net/ixgbe/ixgbe.h
@@ -491,6 +491,7 @@ struct ixgbe_adapter {
        u64 rsc_total_flush;
        u32 wol;
        u16 eeprom_version;
+       u16 eeprom_cap;
 
        int node;
        u32 led_reg;

diff --git a/drivers/net/ixgbe/ixgbe_ethtool.c b/drivers/net/ixgbe/ixgbe_ethtool.c
index f3063a5b90e5aaa4fc44d81a0b33fe14cf4558e9..709baab851091d4947a82c5eccbe85e64344abd9 100644 (file)
--- a/drivers/net/ixgbe/ixgbe_ethtool.c
+++ b/drivers/net/ixgbe/ixgbe_ethtool.c
@@ -1883,6 +1883,7 @@ static int ixgbe_wol_exclusion(struct ixgbe_adapter *adapter,
 {
        struct ixgbe_hw *hw = &adapter->hw;
        int retval = 1;
+       u16 wol_cap = adapter->eeprom_cap & IXGBE_DEVICE_CAPS_WOL_MASK;
 
        /* WOL not supported except for the following */
        switch(hw->device_id) {
@@ -1906,6 +1907,18 @@ static int ixgbe_wol_exclusion(struct ixgbe_adapter *adapter,
        case IXGBE_DEV_ID_82599_KX4:
                retval = 0;
                break;
+       case IXGBE_DEV_ID_X540T:
+               /* check eeprom to see if enabled wol */
+               if ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0_1) ||
+                   ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0) &&
+                    (hw->bus.func == 0))) {
+                       retval = 0;
+                       break;
+               }
+
+               /* All others not supported */
+               wol->supported = 0;
+               break;
        default:
                wol->supported = 0;
        }

diff --git a/drivers/net/ixgbe/ixgbe_main.c b/drivers/net/ixgbe/ixgbe_main.c
index 5c9f1ee36b0f3d1a0c85a7774d4473f00fbffc39..4c91b85eacf8a083cb1f76d4e60758b32e7a9fca 100644 (file)
--- a/drivers/net/ixgbe/ixgbe_main.c
+++ b/drivers/net/ixgbe/ixgbe_main.c
@@ -7074,6 +7074,7 @@ static int __devinit ixgbe_probe(struct pci_dev *pdev,
        u16 device_caps;
 #endif
        u32 eec;
+       u16 wol_cap;
 
        /* Catch broken hardware that put the wrong VF device ID in
         * the PCIe SR-IOV capability.
@@ -7338,6 +7339,8 @@ static int __devinit ixgbe_probe(struct pci_dev *pdev,
                netdev->features &= ~NETIF_F_RXHASH;
        }
 
+       /* WOL not supported for all but the following */
+       adapter->wol = 0;
        switch (pdev->device) {
        case IXGBE_DEV_ID_82599_SFP:
                /* Only this subdevice supports WOL */
@@ -7352,8 +7355,15 @@ static int __devinit ixgbe_probe(struct pci_dev *pdev,
        case IXGBE_DEV_ID_82599_KX4:
                adapter->wol = IXGBE_WUFC_MAG;
                break;
-       default:
-               adapter->wol = 0;
+       case IXGBE_DEV_ID_X540T:
+               /* Check eeprom to see if it is enabled */
+               hw->eeprom.ops.read(hw, 0x2c, &adapter->eeprom_cap);
+               wol_cap = adapter->eeprom_cap & IXGBE_DEVICE_CAPS_WOL_MASK;
+
+               if ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0_1) ||
+                   ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0) &&
+                    (hw->bus.func == 0)))
+                       adapter->wol = IXGBE_WUFC_MAG;
                break;
        }
        device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);

diff --git a/drivers/net/ixgbe/ixgbe_type.h b/drivers/net/ixgbe/ixgbe_type.h
index eea5a007b2ef5d7a23b74f3b5afa9bdd98657028..94e2554d18d0b3105e9ccbcde28b4cd0dc55f41f 100644 (file)
--- a/drivers/net/ixgbe/ixgbe_type.h
+++ b/drivers/net/ixgbe/ixgbe_type.h
@@ -1752,6 +1752,10 @@ enum {
 #define IXGBE_ALT_SAN_MAC_ADDR_CAPS_SANMAC  0x0 /* Alt. SAN MAC exists */
 #define IXGBE_ALT_SAN_MAC_ADDR_CAPS_ALTWWN  0x1 /* Alt. WWN base exists */
 
+#define IXGBE_DEVICE_CAPS_WOL_PORT0_1  0x4 /* WoL supported on ports 0 & 1 */
+#define IXGBE_DEVICE_CAPS_WOL_PORT0    0x8 /* WoL supported on port 0 */
+#define IXGBE_DEVICE_CAPS_WOL_MASK     0xC /* Mask for WoL capabilities */
+
 /* PCI Bus Info */
 #define IXGBE_PCI_DEVICE_STATUS   0xAA
 #define IXGBE_PCI_DEVICE_STATUS_TRANSACTION_PENDING   0x0020