nxp   NXP Semiconductors
  okaya Okaya Electric America, Inc.
  olimex        OLIMEX Ltd.
 +onion Onion Corporation
  onnn  ON Semiconductor Corp.
+ ontat On Tat Industrial Company
  opencores     OpenCores.org
  option        Option NV
  ortustech     Ortus Technology Co., Ltd.
 
        samsung,color-depth = <1>;
        samsung,link-rate = <0x0a>;
        samsung,lane-count = <2>;
-       samsung,hpd-gpio = <&gpx0 7 GPIO_ACTIVE_HIGH>;
+       hpd-gpios = <&gpx0 7 GPIO_ACTIVE_HIGH>;
  
        ports {
 -              port@0 {
 +              port0 {
                        dp_out: endpoint {
                                remote-endpoint = <&bridge_in>;
                        };
 
        samsung,color-depth = <1>;
        samsung,link-rate = <0x06>;
        samsung,lane-count = <2>;
-       samsung,hpd-gpio = <&gpx2 6 GPIO_ACTIVE_HIGH>;
+       hpd-gpios = <&gpx2 6 GPIO_ACTIVE_HIGH>;
  
        ports {
 -              port@0 {
 +              port0 {
                        dp_out: endpoint {
                                remote-endpoint = <&bridge_in>;
                        };
 
        if (args->flags & ~(I915_MMAP_WC))
                return -EINVAL;
  
 -      if (args->flags & I915_MMAP_WC && !cpu_has_pat)
 +      if (args->flags & I915_MMAP_WC && !boot_cpu_has(X86_FEATURE_PAT))
                return -ENODEV;
  
-       obj = drm_gem_object_lookup(dev, file, args->handle);
+       obj = drm_gem_object_lookup(file, args->handle);
        if (obj == NULL)
                return -ENOENT;
  
 
                pipe_config->has_pch_encoder = true;
  
        /* LPT FDI RX only supports 8bpc. */
 -      if (HAS_PCH_LPT(dev))
 +      if (HAS_PCH_LPT(dev)) {
 +              if (pipe_config->bw_constrained && pipe_config->pipe_bpp < 24) {
 +                      DRM_DEBUG_KMS("LPT only supports 24bpp\n");
 +                      return false;
 +              }
 +
                pipe_config->pipe_bpp = 24;
 +      }
  
        /* FDI must always be 2.7 GHz */
-       if (HAS_DDI(dev)) {
-               pipe_config->ddi_pll_sel = PORT_CLK_SEL_SPLL;
+       if (HAS_DDI(dev))
                pipe_config->port_clock = 135000 * 2;
  
-               pipe_config->dpll_hw_state.wrpll = 0;
-               pipe_config->dpll_hw_state.spll =
-                       SPLL_PLL_ENABLE | SPLL_PLL_FREQ_1350MHz | SPLL_PLL_SSC;
-       }
- 
        return true;
  }
  
 
                break;
        }
  
 -      pipe_config->has_audio =
 -              intel_ddi_is_audio_enabled(dev_priv, intel_crtc);
 +      if (intel_display_power_is_enabled(dev_priv, POWER_DOMAIN_AUDIO)) {
 +              temp = I915_READ(HSW_AUD_PIN_ELD_CP_VLD);
 +              if (temp & AUDIO_OUTPUT_ENABLE(intel_crtc->pipe))
 +                      pipe_config->has_audio = true;
 +      }
  
-       if (encoder->type == INTEL_OUTPUT_EDP && dev_priv->vbt.edp_bpp &&
-           pipe_config->pipe_bpp > dev_priv->vbt.edp_bpp) {
+       if (encoder->type == INTEL_OUTPUT_EDP && dev_priv->vbt.edp.bpp &&
+           pipe_config->pipe_bpp > dev_priv->vbt.edp.bpp) {
                /*
                 * This is a big fat ugly hack.
                 *