arm64: Convert HPFAR_EL2 to sysreg table

Switch over to the typical sysreg table for HPFAR_EL2 as we're about to
start using more fields in the register.

Reviewed-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20250402201725.2963645-3-oliver.upton@linux.dev
Signed-off-by: Oliver Upton <oliver.upton@linux.dev>

diff --git a/arch/arm64/include/asm/kvm_emulate.h b/arch/arm64/include/asm/kvm_emulate.h
index d7cf66573acaff2dcd59bb22db0f479e2f1c0e9f..44e3fc6483c8d04d1f0d209e55debe0f3a1206ea 100644 (file)
--- a/arch/arm64/include/asm/kvm_emulate.h
+++ b/arch/arm64/include/asm/kvm_emulate.h
@@ -305,7 +305,9 @@ static __always_inline unsigned long kvm_vcpu_get_hfar(const struct kvm_vcpu *vc
 
 static __always_inline phys_addr_t kvm_vcpu_get_fault_ipa(const struct kvm_vcpu *vcpu)
 {
-       return ((phys_addr_t)vcpu->arch.fault.hpfar_el2 & HPFAR_MASK) << 8;
+       u64 hpfar = vcpu->arch.fault.hpfar_el2;
+
+       return FIELD_GET(HPFAR_EL2_FIPA, hpfar) << 12;
 }
 
 static inline u64 kvm_vcpu_get_disr(const struct kvm_vcpu *vcpu)

diff --git a/arch/arm64/kvm/hyp/nvhe/mem_protect.c b/arch/arm64/kvm/hyp/nvhe/mem_protect.c
index f34f11c720d70792afdc279a469a92003dbe5d38..5ce2230054d984f06a9eaebc46b293ad85466f28 100644 (file)
--- a/arch/arm64/kvm/hyp/nvhe/mem_protect.c
+++ b/arch/arm64/kvm/hyp/nvhe/mem_protect.c
@@ -578,7 +578,7 @@ void handle_host_mem_abort(struct kvm_cpu_context *host_ctxt)
                return;
        }
 
-       addr = (fault.hpfar_el2 & HPFAR_MASK) << 8;
+       addr = FIELD_GET(HPFAR_EL2_FIPA, fault.hpfar_el2) << 12;
        ret = host_stage2_idmap(addr);
        BUG_ON(ret && ret != -EAGAIN);
 }

diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg
index 2c63662c1a489826afe408ba69f3469c559d8af4..31ad9ce2b91c51db72151e92ac406611ba4036fb 100644 (file)
--- a/arch/arm64/tools/sysreg
+++ b/arch/arm64/tools/sysreg
@@ -3433,3 +3433,10 @@ Field    5       F
 Field  4       P
 Field  3:0     Align
 EndSysreg
+
+Sysreg HPFAR_EL2       3       4       6       0       4
+Field  63      NS
+Res0   62:48
+Field  47:4    FIPA
+Res0   3:0
+EndSysreg